2.5 Start Condition

The I²C specification defines a Start condition as the transition of the SDA line from an idle state (logic high level) to an active state (logic low level) while the SCL line is idle (see figure below). The Start condition is always initiated by the master and signifies the beginning of a transmission.

According to the I²C specification, a bus collision cannot occur on a Start condition. The Bus Free (BFRE) bit is used by module hardware to indicate the status of the bus. The Bus Free Time (BFRET<1:0>) bits define the amount of I²C clock cycles that master hardware must detect while the bus is idle before the BFRE bit is asserted. When the BFRE bit is set (BFRE = 1), the bus is considered in an idle state, and a master device may issue a Start condition. If there is more than one master on the bus (Multi-Master mode), and both attempt to issue a Start condition simultaneously, a bus collision will occur during the addressing phase of communication.