11.6 Crystal Oscillator
Parameter | Test Condition | Symbol | Rating | Unit | ||
---|---|---|---|---|---|---|
Min | Typ | Max | ||||
Crystal Oscillator frequency | Fundamental | Xtal | 24 | MHz | ||
Internal parasitic capacitance | Between XIN and XOUT | CPARA24M | 0.6 | 0.7 | 0.8 | pF |
Start-up time | tON | — | — | 1 | ms | |
Drive level | PON | — | — | 400 | µW | |
Load capacitance | CLOAD | 4 | — | 18 | pF |
CX = 2 x (CXTAL – CPARA24M – CPCB /2) |
Where CXTAL is the load capacitance of the crystal, CPARA24M is the internal parasitic impedance of the oscillator, typically 0.7pF and CPCB is the ground-referenced parasitic capacitance of the printed circuit board (PCB) on XIN and XOUT tracks.
Table 11-9 summarizes recommendations to be followed when choosing a crystal.
The drive level indicates power consumption by the crystal unit while the oscillation circuit works. Excessive drive level might cause unexpected change of frequency, crystal damage or shorter device lifetime. The drive level is given by the following formula:
|
- ESR is the equivalent series resistor (specified by the crystal manufacturer).
- I is the current flowing through the crystal in RMS. If the waveform is sine wave or similar, the effective value is calculated by Ip-p/2√2.
To keep the drive level value inside the manufacturer range, it is required to limit the current that flows through the crystal. The total power dissipated by the crystal is proportional to RS (see Figure 11-1), so its value can be modified to obtain a drive level that complies with the requirements. As the value of RS also relates to the safety factor, there is a maximum value of RS that maintains a good safety factor and at the same time keeps the drive level below the crystal manufacturer maximum specifications.
Parameter | Symbol | Rating | Unit | ||
---|---|---|---|---|---|
Min | Typ | Max | |||
Equivalent Series Resistor | ESR | — | — | 100 | Ω |
Motional capacitance | CM | 2 | — | 3.2 | fF |
Shunt capacitance | CSHUNT | — | — | 1.3 | pF |
Frequency tolerance | — | — | 10(1) | 25 | ppm |
- As a requirement of the G3-PLC specification, the System Clock tolerance shall be ±25 ppm maximum. In the case of PRIME specification, it shall be ±50 ppm maximum. In both cases, Microchip recommends choosing a crystal with a frequency tolerance below the specification requirement because it is dependent on production tolerance, temperature stability and age.