4.9.8.1 NSS Pin Functionality

Client Mode

When the SPI is configured as a client, the not client select (NSS) pin is an input. When NSS is held low, the SPI is activated and MISO becomes an output if configured that way by the user in the corresponding DDR register. All other pins are inputs. When NSS is driven high, all pins are inputs except MISO which must be user configured as an output in the corresponding DDR register. SPI is passive then, meaning it does not receive incoming data.

The NSS pin is useful for packet/byte synchronization to keep the client bit counter synchronous with the host clock generator. When the NSS pin is driven high, the SPI client immediately resets the send and receive logic and discards any partially received data in the shift register.

Host Mode

When the SPI is configured as a host (MSTR in SPCR is set), the user can determine the direction of the NSS pin.

If NSS is configured as an output, the pin is a general output pin which does not affect the SPI system. Typically, the pin drives the NSS pin of the SPI client.

If NSS is configured as an input, it must be held high to ensure host SPI operation. If the NSS pin is driven low by peripheral circuitry when the SPI is configured as a host with the NSS pin defined as an input, the SPI system interprets this as another host selecting the SPI as a client and starting to send data to it. To avoid bus contention, the SPI system takes the following actions:

The MSTR bit in SPCR is cleared and the SPI system becomes a client. As a result of the SPI becoming a client, the MOSI and SCK pins become inputs.

The SPIF flag in SPSR is set, and if the SPI interrupt is enabled and the I bit in SREG is set, the interrupt routine is executed.

Thus, when interrupt-driven SPI transmission is used in host mode and NSS might be driven low, the interrupt must always check that the MSTR bit is still set. If the MSTR bit was cleared by a client select, it must be set by the user to re-enable SPI host mode.