4.9.6 I/O Ports

All AVR ports have true read-modify-write functionality when used as general digital I/O ports. This means that the direction of one port pin can be changed without unintentionally changing the direction of any other pin with the SBI and CBI instructions. The same applies when changing the drive value (if configured as output) or enabling/disabling pull-up resistors (if configured as input). Each output buffer has symmetrical drive characteristics with both, high sink and source capability.

The only exception for this rule is the RX_ACTIVE (PB7) pin when configured as supply. See Alternate Port Functions from Related Links. All port pins have individually selectable pull-up resistors with supply-voltage invariant resistance. All I/O pins have protection diodes to both VS and DGND (see the following figure). For a complete list of parameters for ports PB0 to PB7 and PC0 to PC5, refer to the ATA8210/ATA8215 UHF ASK/FSK Receiver Data Sheet (9344E). The reference pins for the ports are pin 13 (VS) and pin 21 (DGND).

Figure 4-43. I/O Pin Equivalent Schematic

All registers and bit references in this section are written in general form. A lower case “x” represents the numbering letter for the port, and a lower case “n” represents the bit number within the port. However, when using the register or bit definitions in a program, the precise form must be used. For example, as a general rule, PORTB3 for bit no. 3 in port B is documented as PORTxn. For more details on the physical I/O registers and bit locations, see I/O Ports Register Description from Related Links.

Three I/O memory address locations are allocated for each port, one each for the data register (PORTx), data direction register (DDRx) and the port input pins (PINx). The port input pins I/O location is read-only, while the data register and the data direction register are read/write. However, writing a logic ‘1’ to a bit in the PINx register results in a toggle in the corresponding bit in the data register. In addition, when it is set, the pull-up disable (PUD) bit in MCUCR disables the pull-up function for all pins in all ports.

For more details of using the I/O port as general digital, see Ports as General Digital I/O from Related Links. Most port pins are multiplexed with alternate functions for the peripheral features on the device. For more details on each alternate function interferes with the port pin, see Alternate Port Functions from Related Links. For the full description of the alternate functions, refer to the individual module sections.

Note: The enabling of the alternate function of some of the port pins does not affect the use of the other pins in the port as a general digital I/O.