36.7.17 Software Trigger

Note: This register is write-synchronized: SYNCBUSY.SWTRIG must be checked to ensure the SWTRIG register synchronization is complete.
Name: SWTRIG
Offset: 0x18
Reset: 0x00
Property: PAC Write-Protection, Write-Synchronized

Bit 76543210 
       STARTFLUSH 
Access WW 
Reset 00 

Bit 1 – START ADC Start Conversion

Writing a '1' to this bit will start a conversion or sequence. The bit is cleared by hardware when the conversion has started. Writing a '1' to this bit when it is already set has no effect.

Writing a '0' to this bit will have no effect.

Bit 0 – FLUSH ADC Conversion Flush

Writing a '1' to this bit will flush the ADC pipeline. A flush will restart the ADC clock on the next peripheral clock edge, and all conversions in progress will be aborted and lost. This bit is cleared until the ADC has been flushed.

After the flush, the ADC will resume where it left off; i.e., if a conversion was pending, the ADC will start a new conversion.

Writing this bit to '0' will have no effect.