36.7.16 Offset Correction
Note: This register is write-synchronized: SYNCBUSY.OFFSETCORR must be checked to ensure
the OFFSETCORR register synchronization is complete.
| Name: | OFFSETCORR |
| Offset: | 0x14 |
| Reset: | 0x0000 |
| Property: | PAC Write-Protection, Write-Synchronized |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| OFFSETCORR[11:8] | |||||||||
| Access | R/W | R/W | R/W | R/W | |||||
| Reset | 0 | 0 | 0 | 0 | |||||
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| OFFSETCORR[7:0] | |||||||||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
Bits 11:0 – OFFSETCORR[11:0] Offset Correction Value
If CTRLC.CORREN=1, these bits define how the ADC conversion result is compensated for offset error before being written to the Result register. This OFFSETCORR value is in two’s complement format. Offset correction should not be used for 8-bit and 10-bit conversion resolution.