36.6.13 ISI Interrupt Disable Register

Name: ISI_IDR
Offset: 0x30
Reset: 
Property: Write-only

Bit 3130292827262524 
     FR_OVRCRC_ERRC_OVRP_OVR 
Access WWWW 
Reset  
Bit 2322212019181716 
       CXFR_DONEPXFR_DONE 
Access WW 
Reset  
Bit 15141312111098 
      VSYNC   
Access W 
Reset  
Bit 76543210 
      SRSTDIS_DONE  
Access WW 
Reset  

Bit 27 – FR_OVR Frame Rate Overflow Interrupt Disable

ValueDescription
0

No effect.

1

Disables the corresponding interrupt.

Bit 26 – CRC_ERR Embedded Synchronization CRC Error Interrupt Disable

ValueDescription
0

No effect.

1

Disables the corresponding interrupt.

Bit 25 – C_OVR Codec Datapath Overflow Interrupt Disable

ValueDescription
0

No effect.

1

Disables the corresponding interrupt.

Bit 24 – P_OVR Preview Datapath Overflow Interrupt Disable

ValueDescription
0

No effect.

1

Disables the corresponding interrupt.

Bit 17 – CXFR_DONE Codec DMA Transfer Done Interrupt Disable

ValueDescription
0

No effect.

1

Disables the corresponding interrupt.

Bit 16 – PXFR_DONE Preview DMA Transfer Done Interrupt Disable

ValueDescription
0

No effect.

1

Disables the corresponding interrupt.

Bit 10 – VSYNC Vertical Synchronization Interrupt Disable

ValueDescription
0

No effect.

1

Disables the corresponding interrupt.

Bit 2 – SRST Software Reset Interrupt Disable

ValueDescription
0

No effect.

1

Disables the corresponding interrupt.

Bit 1 – DIS_DONE Disable Done Interrupt Disable

ValueDescription
0

No effect.

1

Disables the corresponding interrupt.