36.6.12 ISI Interrupt Enable Register
| Name: | ISI_IER |
| Offset: | 0x2C |
| Reset: | – |
| Property: | Write-only |
| Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
| FR_OVR | CRC_ERR | C_OVR | P_OVR | ||||||
| Access | W | W | W | W | |||||
| Reset | – | – | – | – |
| Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
| CXFR_DONE | PXFR_DONE | ||||||||
| Access | W | W | |||||||
| Reset | – | – |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| VSYNC | |||||||||
| Access | W | ||||||||
| Reset | – |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| SRST | DIS_DONE | ||||||||
| Access | W | W | |||||||
| Reset | – | – |
Bit 27 – FR_OVR Frame Rate Overflow Interrupt Enable
| Value | Description |
|---|---|
| 0 | No effect. |
| 1 | Enables the corresponding interrupt. |
Bit 26 – CRC_ERR Embedded Synchronization CRC Error Interrupt Enable
| Value | Description |
|---|---|
| 0 | No effect. |
| 1 | Enables the corresponding interrupt. |
Bit 25 – C_OVR Codec Datapath Overflow Interrupt Enable
| Value | Description |
|---|---|
| 0 | No effect. |
| 1 | Enables the corresponding interrupt. |
Bit 24 – P_OVR Preview Datapath Overflow Interrupt Enable
| Value | Description |
|---|---|
| 0 | No effect. |
| 1 | Enables the corresponding interrupt. |
Bit 17 – CXFR_DONE Codec DMA Transfer Done Interrupt Enable
| Value | Description |
|---|---|
| 0 | No effect. |
| 1 | Enables the corresponding interrupt. |
Bit 16 – PXFR_DONE Preview DMA Transfer Done Interrupt Enable
| Value | Description |
|---|---|
| 0 | No effect. |
| 1 | Enables the corresponding interrupt. |
Bit 10 – VSYNC Vertical Synchronization Interrupt Enable
| Value | Description |
|---|---|
| 0 | No effect. |
| 1 | Enables the corresponding interrupt. |
Bit 2 – SRST Software Reset Interrupt Enable
| Value | Description |
|---|---|
| 0 | No effect. |
| 1 | Enables the corresponding interrupt. |
Bit 1 – DIS_DONE Disable Done Interrupt Enable
| Value | Description |
|---|---|
| 0 | No effect. |
| 1 | Enables the corresponding interrupt. |