58.13.1.8.2 Write Timings

Table 58-58. SMC Write Signals - NWE Controlled (WRITE_MODE = 1)
Symbol VDDIO Supply 1.8V Domain 3.3V Domain 1.8V Domain 3.3V Domain Unit
Parameter Min Max
HOLD or NO HOLD Settings (NWE_HOLD ≠ 0, NWE_HOLD = 0)
SMC15 Data Out Valid before NWE High NWE_PULSE × tCPMCK - 5.4 NWE_PULSE × tCPMCK - 4.6 ns
SMC16 NWE Pulse Width NWE_PULSE × tCPMCK - 0.7 NWE_PULSE × tCPMCK - 0.3 ns
SMC17 A0–A22 valid before NWE low NWE_SETUP × tCPMCK - 4.9 NWE_SETUP × tCPMCK - 4.2 ns
SMC18 NCS low before NWE high (NWE_SETUP - NCS_RD_SETUP + NWE_PULSE) × tCPMCK - 3.2 (NWE_SETUP - NCS_RD_SETUP + NWE_PULSE) × tCPMCK - 2.2 ns
HOLD Settings (NWE_HOLD ≠ 0)
SMC19 NWE High to Data OUT, NBS0/A0 NBS1, A1, A2–A25 change NWE_HOLD × tCPMCK - 4.6 NWE_HOLD × tCPMCK - 3.9 ns
SMC20 NWE High to NCS Inactive (1) (NWE_HOLD - NCS_WR_HOLD) × tCPMCK - 3.9 (NWE_HOLD - NCS_WR_HOLD) × tCPMCK - 3.6 ns
NO HOLD Settings (NWE_HOLD = 0)
SMC21 NWE High to Data OUT, NBS0/A0 NBS1, A1, A2–A25, NCS change(1) 2.1 1.5 ns
Note:

Hold length = total cycle duration - setup duration - pulse duration. “hold length” is for “NCS_WR_HOLD length” or “NWE_HOLD length”

Table 58-59. SMC Write NCS Controlled (WRITE_MODE = 0)
Symbol VDDIO Supply 1.8V Domain 3.3V Domain 1.8V Domain 3.3V Domain Unit
Parameter Min Max
SMC22 Data Out Valid before NCS High NCS_WR_PULSE × tCPMCK - 2.8 NCS_WR_PULSE × tCPMCK - 3.9 ns
SMC23 NCS Pulse Width NCS_WR_PULSE × tCPMCK - 0.9 NCS_WR_PULSE × tCPMCK - 0.2 ns
SMC24 A0–A22 valid before NCS low NCS_WR_SETUP × tCPMCK - 4.0 NCS_WR_SETUP × tCPMCK - 4.6 ns
SMC25 NWE low before NCS high (NCS_WR_SETUP - NWE_SETUP + NCS pulse) × tCPMCK - 4.6 (NCS_WR_SETUP - NWE_SETUP + NCS pulse) × tCPMCK - 4.6 ns
SMC26 NCS High to Data Out, A0–A25, change NCS_WR_HOLD × tCPMCK - 4.4 NCS_WR_HOLD × tCPMCK - 3.4 ns
SMC27 NCS High to NWE Inactive (NCS_WR_HOLD - NWE_HOLD) × tCPMCK - 2.8 (NCS_WR_HOLD - NWE_HOLD) × tCPMCK - 2.4 ns

Timings are given in the 3.3V domain, with VDDIO from 2.85V to 3.6V, maximum external capacitor = 50 pF.

Timings are given assuming a capacitance load on data, control and address pads.

In the tables that follow, tCPMCK is MCK period.