51.7.4 AFEC Channel Sequence 1 Register

This register can only be written if the WPEN bit is cleared in the AFEC Write Protection Mode Register.

Name:	AFEC_SEQ1R
Offset:	0x0C
Reset:	0x00000000
Property:	Read/Write


Bit	31	30	29	28	27	26	25	24
	USCH7[3:0]				USCH6[3:0]
Access	R/W	R/W	R/W	R/W	R/W	R/W	R/W	R/W
Reset	0	0	0	0	0	0	0	0


Bit	23	22	21	20	19	18	17	16
	USCH5[3:0]				USCH4[3:0]
Access	R/W	R/W	R/W	R/W	R/W	R/W	R/W	R/W
Reset	0	0	0	0	0	0	0	0


Bit	15	14	13	12	11	10	9	8
	USCH3[3:0]				USCH2[3:0]
Access	R/W	R/W	R/W	R/W	R/W	R/W	R/W	R/W
Reset	0	0	0	0	0	0	0	0


Bit	7	6	5	4	3	2	1	0
	USCH1[3:0]				USCH0[3:0]
Access	R/W	R/W	R/W	R/W	R/W	R/W	R/W	R/W
Reset	0	0	0	0	0	0	0	0

Bits 0:3, 4:7, 8:11, 12:15, 16:19, 20:23, 24:27, 28:31 – USCHx User Sequence Number x

The sequence number x (USCHx) can be programmed by the Channel number CHy where y is the value written in this field. The allowed range is 0 up to 11. So it is only possible to use the sequencer from CH0 to CH11.

This register activates only if AFEC_MR.USEQ is set.

Any USCHx field is taken into account only if AFEC_CHSR.CHx is set, else any value written in USCHx does not add the corresponding channel in the conversion sequence.

Configuring the same value in different fields leads to multiple samples of the same channel during the conversion sequence. This can be done consecutively, or not, depending on user requirements.