19.14.4 TMRxGATE

Timer Gate Source Selection Register
Name: TMRxGATE
Offset: 0x210,0x216,0x21C

Bit 76543210 
    GSS[4:0] 
Access R/WR/WR/WR/WR/W 
Reset 00000 

Bits 4:0 – GSS[4:0] Timer Gate Source Selection bits

Table 19-3. Timer Gate Sources
GSSGate Source
Timer1Timer3Timer5
11111-11001ReservedReservedReserved
10110CLC4_outCLC4_outCLC4_out
10101CLC3_outCLC3_outCLC3_out
10100CLC2_outCLC2_outCLC2_out
10011CLC1_outCLC1_outCLC1_out
10010ZCD1_outputZCD1_outputZCD1_output
10001C2OUT_syncC2OUT_syncC2OUT_sync
10000C1OUT_syncC1OUT_syncC1OUT_sync
01111NCO1_outNCO1_outNCO1_out
01110PWM7_outPWM7_outPWM7_out
01101PWM6_outPWM6_outPWM6_out
01100CCP4_outCCP4_outCCP4_out
01011CCP3_outCCP3_outCCP3_out
01010CCP2_outCCP2_outCCP2_out
01001CCP1_outCCP1_outCCP1_out
01000SMT1_overflowSMT1_overflowSMT1_overflow
00111TMR6_postscaled outputTMR6_postscaled outputTMR6_postscaled output
00110Timer5 overflow outputTimer5 overflow outputReserved
00101TMR4_postscaled outputTMR4_postscaled outputTMR4_postscaled output
00100Timer3 overflow outputReservedTimer3 overflow output
00011TMR2_postscaled outputTMR2_postscaled outputTMR2_postscaled output
00010ReservedTimer1 overflow outputTimer1 overflow output
00001Timer0 overflow outputTimer0 overflow outputTimer0 overflow output
00000T1GPPST3GPPST5GPPS
Reset States: 
POR/BOR = 00000
All Other Resets = uuuuu