19.13 Register Summary - Timer1
Offset | Name | Bit Pos. | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
---|---|---|---|---|---|---|---|---|---|---|
0x00 ... 0x020B | Reserved | |||||||||
0x020C | TMR1 | 7:0 | TMRx[7:0] | |||||||
15:8 | TMRx[15:8] | |||||||||
0x020E | T1CON | 7:0 | CKPS[1:0] | SYNC | RD16 | ON | ||||
0x020F | T1GCON | 7:0 | GE | GPOL | GTM | GSPM | GGO/DONE | GVAL | ||
0x0210 | TMR1GATE | 7:0 | GSS[4:0] | |||||||
0x0211 | TMR1CLK | 7:0 | CS[4:0] | |||||||
0x0212 | TMR3 | 7:0 | TMRx[7:0] | |||||||
15:8 | TMRx[15:8] | |||||||||
0x0214 | T3CON | 7:0 | CKPS[1:0] | SYNC | RD16 | ON | ||||
0x0215 | T3GCON | 7:0 | GE | GPOL | GTM | GSPM | GGO/DONE | GVAL | ||
0x0216 | TMR3GATE | 7:0 | GSS[4:0] | |||||||
0x0217 | TMR3CLK | 7:0 | CS[4:0] | |||||||
0x0218 | TMR5 | 7:0 | TMRx[7:0] | |||||||
15:8 | TMRx[15:8] | |||||||||
0x021A | T5CON | 7:0 | CKPS[1:0] | SYNC | RD16 | ON | ||||
0x021B | T5GCON | 7:0 | GE | GPOL | GTM | GSPM | GGO/DONE | GVAL | ||
0x021C | TMR5GATE | 7:0 | GSS[4:0] | |||||||
0x021D | TMR5CLK | 7:0 | CS[4:0] |