20.4 Timer2 Interrupt

Timer2 can also generate a device interrupt. The interrupt is generated when the postscaler counter matches with the selected postscaler value (OUTPS bits of T2CON register). The interrupt is enabled by setting the TMR2IE interrupt enable bit. Interrupt timing is illustrated in the figure below.

Figure 20-2. Timer2 Prescaler, Postscaler, and Interrupt Timing Diagram
Note:
  1. Setting the interrupt flag is synchronized with the instruction clock.
  2. Cleared by software.