20.10 Register Summary - Timer2
| Offset | Name | Bit Pos. | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|
0x00 ... 0x028B | Reserved | |||||||||
| 0x028C | T2TMR | 7:0 | TxTMR[7:0] | |||||||
| 0x028D | T2PR | 7:0 | TxPR[7:0] | |||||||
| 0x028E | T2CON | 7:0 | ON | CKPS[2:0] | OUTPS[3:0] | |||||
| 0x028F | T2HLT | 7:0 | PSYNC | CPOL | CSYNC | MODE[4:0] | ||||
| 0x0290 | T2CLKCON | 7:0 | CS[3:0] | |||||||
| 0x0291 | T2RST | 7:0 | RSEL[4:0] | |||||||
| 0x0292 | T4TMR | 7:0 | TxTMR[7:0] | |||||||
| 0x0293 | T4PR | 7:0 | TxPR[7:0] | |||||||
| 0x0294 | T4CON | 7:0 | ON | CKPS[2:0] | OUTPS[3:0] | |||||
| 0x0295 | T4HLT | 7:0 | PSYNC | CPOL | CSYNC | MODE[4:0] | ||||
| 0x0296 | T4CLKCON | 7:0 | CS[3:0] | |||||||
| 0x0297 | T4RST | 7:0 | RSEL[4:0] | |||||||
| 0x0298 | T6TMR | 7:0 | TxTMR[7:0] | |||||||
| 0x0299 | T6PR | 7:0 | TxPR[7:0] | |||||||
| 0x029A | T6CON | 7:0 | ON | CKPS[2:0] | OUTPS[3:0] | |||||
| 0x029B | T6HLT | 7:0 | PSYNC | CPOL | CSYNC | MODE[4:0] | ||||
| 0x029C | T6CLKCON | 7:0 | CS[3:0] | |||||||
| 0x029D | T6RST | 7:0 | RSEL[4:0] | |||||||