45.4.15 I3C Open-Drain Timing Specifications

Table 45-21.
Standard Operating Conditions (unless otherwise stated) Operating Temperature: -40°C≤T_A≤+125°C
Param No.	Sym.	Characteristic	Min.	Typ. †	Max.	Units	Conditions
I3C01*	T_{LOW_OD}	SCL Clock Low Period	200	—	—	ns
I3C02*	T_{DIG_OD_L}	SCL Clock Low Period	T_{LOW_OD:min} + T_{FDA_OD:min}	—	—	ns
I3C03*	T_{HIGH_INIT}	SCL Clock High Period (First Broadcast Address)	200	—	—	ns
I3C04*	T_HIGH	SCL Clock High Period (Mixed Bus)	—	—	41	ns
I3C05*	T_{DIG_H}	SCL Clock High Period (Mixed Bus)	—	—	T_HIGH + T_CF	ns
I3C06*	T_HIGH	SCL Clock High Period (Pure Bus)	24	—	—	ns
I3C07*	T_{DIG_H}	SCL Clock High Period (Pure Bus)	32	—	—	ns
I3C08*	T_{RDA_OD}	SDA Signal Rise Time	—	—	300	ns	Mixed Bus 400 kHz mode compatible
I3C09*	T_{FDA_OD}	SDA Signal Fall Time	—	—	12	ns
I3C10*	T_{SU_OD}	SDA Signal Data Setup Time	3	—	—	ns
I3C11*	T_CAS	Clock After Start Condition	38.4 ns	—	50 ms	—
I3C12*	T_CBP	Clock Before Stop Condition	T_CAS:min / 2	—	—	ns
I3C13*	T_BUF	Bus Free Condition	T_CAS:min	—	—	ns	Pure Bus
			1300	—	—	ns	Mixed Bus 400 kHz mode
			500	—	—	ns	Mixed Bus 1 MHz mode
I3C14*	T_AVAL	Bus Available Condition	1	—	—	µs
I3C15*	T_IDLE	Bus Idle Condition	200	—	—	µs
I3C16*	T_LVBUF	I3C Low-Voltage Buffer Startup Time	—	0.4	630	µs

Figure 45-19. I3C Start/Restart/Stop Bit Timing