45.4.16 I3C Push-Pull SDR Timing Specifications

Table 45-22.
Standard Operating Conditions (unless otherwise stated) Operating Temperature: -40°C≤T_A≤+125°C
Param No.	Sym.	Characteristic	Min.	Typ. †	Max.	Units	Conditions
I3C20*	F_SCL	SCL Clock Frequency	0.01	12.5	12.9	MHz
I3C21*	T_LOW	SCL Clock Low Period	24	—	—	ns
I3C22*	T_{DIG_L}	SCL Clock Low Period	32	—	—	ns
I3C23*	T_{HIGH_MIXED}	SCL Clock High Period (Mixed Bus)	24	—	—	ns
I3C24*	T_{DIG_H_MIXED}	SCL Clock High Period (Mixed Bus)	32	—	45	ns
I3C25*	T_HIGH	SCL Clock High Period (Pure Bus)	24	—	—	ns
I3C26*	T_{DIG_H}	SCL Clock High Period (Pure Bus)	32	—	—	ns
I3C27*	T_SCO	Clock in to Data Out	—	—	12	ns	Pad delay based on 90 Ω / 4 mA driver and 50 pF load
I3C28*	T_CR	SCL Clock Rise Time	—	—	60	ns
I3C29*	T_CF	SCL Clock Fall Time	—	—	60	ns
I3C30*	T_{HD_PP}	SDA Signal Data Hold Time	0	—	—	—	Target device only
I3C31*	T_{SU_PP}	SDA Signal Data Setup Time	3	—	—	ns
I3C32*	T_CASR	Clock After Restart Condition	T_CAS:min / 2	—	—	ns
I3C33*	T_CBSR	Clock Before Restart Condition	T_CAS:min / 2	—	—	ns
I3C34*	C_B	Capacitive Load per Bus Line (SDA/SCL)	—	—	50	pF

Figure 45-20. I3C Controller Out Timing

Figure 45-21. I3C Target Out Timing