45.4.8 Analog-to-Digital Converter (ADC) Conversion Timing Specifications

Standard Operating Conditions (unless otherwise stated)
Param No.Sym.CharacteristicMin.Typ. †Max.UnitsConditions
AD20*TADADC Clock Period0.5—9μsUsing FOSC as the ADC clock source ADOCS = 0
AD20A*—2—μsUsing ADCRC as the ADC clock source ADOCS = 1
AD21*TCNVConversion Time—12 TAD + 2 TCY—TADUsing FOSC as the ADC clock source ADOCS = 0
AD21A*—14 TAD + 2 TCY—TADUsing ADCRC as the ADC clock source ADOCS = 1
AD22*THCDSample-and-Hold Capacitor Disconnect Time—2 TAD + 1 TCY—TADUsing FOSC as the ADC clock source ADOCS = 0
AD22A*—3 TAD + 2 TCY—TADUsing ADCRC as the ADC clock source ADOCS = 1

* These parameters are characterized but not tested.

† Data in “Typ” column is at 3.0V, 25°C unless otherwise stated. These parameters are for design guidance only and are not tested.

Figure 45-9. ADC Conversion Timing (ADC Clock FOSC-Based)
Figure 45-10. ADC Conversion Timing (ADC Clock from ADCRC)