30.2.23.1 CTRLA - NVM Write Control Register

Table 30-4. Register Bit Attribute Legend
Symbol Description Symbol Description Symbol Description
R Readable bit HC Cleared by Hardware (Grey cell) Unimplemented
W Writable bit HS Set by Hardware X Bit is unknown at Reset
K Write to clear S Software settable bit — —
Name: CTRLA
Offset: 0x0000
Reset: 0x00000000
Property: PAC Write Protection, KEY.KEY[7:0] = WRKEY to unlock when unprotected

Bit 3130292827262524 
          
Access  
Reset  
Bit 2322212019181716 
          
Access  
Reset  
Bit 15141312111098 
          
Access  
Reset  
Bit 76543210 
 PREPG   NVMOP[3:0] 
Access R/WR/WR/WR/WR/W 
Reset 00000 

Bit 7 – PREPG NVM Pre-Program Configuration Bit

Note:
  1. This field can only be modified when PAC Write protection is disabled, STATUS.BUSY = 0, and KEY = <WRKEY Value> - same as NVMOP below.
  2. It is recommended to either always use or never use PREPG.
ValueDescription
0 Program Operations exclude Pre-Program step
1 Program Operations include Pre-Program step

Bits 3:0 – NVMOP[3:0] NVM Operation

1111-1011 = Reserved

1010 = SDAL: Set DAL per SDALCPUn - must be same or lower value than existing DAL value.(1) Operation is reserved if system debug access level is elevated for the CPU.

For all Write/Erase Operations below, the entire target range must not be write protected.

0111 = PFM Erase Operation: Upper & Lower PFM Erase

0110 = Upper PFM Erase Operation:

0101 = Lower PFM Erase Operation:

0100 = Page Erase Operation: Erases page selected by ADDR

0011 = Row Write Operation: Programs row selected by ADDR

0010 = Quad (DWord) Program Operation: Programs flash word selected by ADDR

0001 = Single (DWord) Program Operation: Programs word selected by ADDR (2)

0000= No Operation

Note:
  1. This field can only be updated (and execute the operation) when PAC Write protection is disabled, STATUS.BUSY = 0, and KEY = <WRKEY>.
  2. If FCR.ECCCTRL.ECCCTL[1:0] = 2’b00, this operation performs a No-Op but does not affect WRERR or RSTERR.