23.8.6 Interrupt Enable Clear
| Symbol | Description | Symbol | Description | Symbol | Description |
|---|---|---|---|---|---|
| R | Readable bit | HC | Cleared by Hardware | (Grey cell) | Unimplemented |
| W | Writable bit | HS | Set by Hardware | X | Bit is unknown at Reset |
| K | Write to clear | S | Software settable bit | — | — |
| Name: | INTENCLR |
| Offset: | 0x08 |
| Reset: | 0x00 |
| Property: | PAC Write-Protection |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| WINMON | DONE | ||||||||
| Access | R/W | R/W | |||||||
| Reset | 0 | 0 |
Bit 1 – WINMON Window Monitor Interrupt Disable
Writing a '0' to this bit has no effect.
Writing a '1' to this bit will clear the Window Monitor Interrupt Enable bit, which disables the Window Monitor interrupt.
| Value | Description |
|---|---|
| 0 | The Window Monitor interrupt is disabled. |
| 1 | The Window Monitor interrupt is enabled. |
Bit 0 – DONE Measurement Done Interrupt Disable
Writing a '0' to this bit has no effect.
Writing a '1' to this bit will clear the Measurement Done Interrupt Enable bit, which disables the Measurement Done interrupt.
| Value | Description |
|---|---|
| 0 | The Measurement Done interrupt is disabled. |
| 1 | The Measurement Done interrupt is enabled. |