1.6.2 SPI Initiator Programming

The SmartFusion2/IGLOO2 devices have dedicated pins for programming the device and probing the fabric I/O.

The embedded system controller contains a dedicated SPI block for programming, which can operate in initiator or target mode. In initiator mode, the SmartFusion2/IGLOO2 devices interface with the external SPI flash from which programming data is downloaded. In target mode, the SPI block communicates with a remote device that initiates download of programming data to the device.

The following figure shows the board-level connectivity for SPI initiator mode programming in SmartFusion2 and IGLOO2 devices.

Figure 1-11. SPI Initiator Mode Programming
The following table lists the dedicated pins used for programming the device and probing the fabric I/O.
Table 1-15. Dedicated Pins

Pin Names

Direction

Description

SPI_0_SDI

Input

Serial data input

SPI_0_SDO

Output

Serial data input

SPI_0_CLK

Output

Serial clock. It is a serial programmable bit rate clock out signal.

SPI_0_SSO1

Output

Target select

FLASH_GOLDEN_N1

Input

If pulled low, the SPI_0 port is put into initiator mode, which indicates that the device is to be reprogrammed from an image in the external SPI flash attached to the SPI_0 interface.

NC

—

No connect. Indicates the pin is not connected to circuitry within the device. NC pins can be driven to any voltage or can be left floating with no effect on the operation of the device.

DNC

—

Do not connect. Must not be connected to any signals on the PCB. DNC pins must be left unconnected.

PROBE_A

—

The two live probe I/O pins are dual-purpose:

  • Live probe functionality
  • User I/O

If probe I/Os are reserved in Libero SoC, they will be configured as tristated outputs. It is recommended to add an external 10k pull-up resistor to each of these I/Os.

If probe I/Os are unreserved in Libero SoC, they will be configured as a general purpose user I/O. If probe I/Os are unused in design, they will be configured as disabled input buffer or an output buffer tristated with a weak pull-up. The 10 kΩ external resistor power supply must be the same as the I/O bank power supply (VDDI).

Ensure to power up the Bank where the Live Probe signals are assigned. That Bank may be different across die/package combination.

PROBE_B

—
Note:
  1. Active Low Signal.

For more information about programming, see UG0451: SmartFusion2 and IGLOO2 Programming User Guide .