10.7 Interfacing with an Octal SPI Memory

The Quad Serial Peripheral Interface (QSPI) is a synchronous serial data link that provides communication with external devices in Host mode.

The QSPI can be used in SPI mode to interface to serial peripherals such as ADCs, DACs, CAN controllers and sensors, or in Serial Memory mode to interface to serial Flash memories.

The QSPI allows the system to execute code directly from a serial Flash memory (eXecute In Place/XIP) without code shadowing to RAM. The serial Flash memory mapping is seen in the system as other memories such as ROM, SRAM, DRAM, embedded Flash memory, etc.

With the support of the Quad/Octal SPI protocol, the QSPI allows the system to use high-performance serial Flash memories, which are small and inexpensive, instead of larger and more expensive parallel Flash memories.

Note: Stacked devices with a rollover in the memory address space at each die boundary are not supported.

Table 10-41. Octal SPI Interface Configuration
Interface Instance	IO Set	Pin No.	Pin Name	Description
QSPI0	1	156	PB9	QSPI0_IO3, Data Input Output 3
		148	PB10	QSPI0_IO2, Data Input Output 2
		158	PB11	QSPI0_IO1, Data Input Output 1
		157	PB12	QSPI0_IO0, Data Input Output 0
		151	PB13	QSPI0_CS, Peripheral Chip Select
		155	PB14	QSPI0_SCK, Serial Clock
		154	PB15	QSPI0_SCKN, QSPI0 Negated Serial Clock for HyperFlash only
		152	PB16	QSPI0_IO4, Data Input Output 4
		159	PB17	QSPI0_IO5, Data Input Output 5
		150	PB18	QSPI0_IO6, Data Input Output 6
		149	PB19	QSPI0_IO7, Data Input Output 7
		153	PB20	QSPI0_DQS, Data Strobe
		160	PB21	QSPI0_INT, Interrupt Input