7.2.5 DMA Transfer Descriptor
The transfer descriptor resides in the SRAM and defines these channel properties.
Field name | Field width |
|---|---|
Descriptor Next Address | 32 bits |
Destination Address | 32 bits |
Source Address | 32 bits |
Block Transfer Counter | 16 bits |
Block Transfer Control | 16 bits |
Before starting a transfer, at least one descriptor should be configured. After a successful allocation of a DMA channel, the transfer descriptor can be added with a call to dma_add_descriptor(). If there is a transfer descriptor already allocated to the DMA resource, the descriptor will be linked to the next descriptor address.