21.6.1.2 Struct system_clock_source_dpll_config

DPLL oscillator configuration structure.

Table 21-2. Members
TypeNameDescription
enum system_clock_source_dpll_filterfilter

Filter type of the DPLL module

boollock_bypass

Bypass lock signal

enum system_clock_source_dpll_lock_timelock_time

Lock time-out value of the DPLL module

boollow_power_enable

Enable low power mode

boolon_demand

Run On Demand. If this is set the DPLL won't run until requested by a peripheral

uint32_toutput_frequency

Output frequency of the clock

enum system_clock_source_dpll_prescalerprescaler

DPLL prescaler

enum system_clock_source_dpll_reference_clockreference_clock

Reference clock source of the DPLL module

uint16_treference_divider

Devider of reference clock

uint32_treference_frequency

Reference frequency of the clock

boolrun_in_standby

Keep the DPLL enabled in standby sleep mode

boolwake_up_fast

Wake up fast. If this is set DPLL output clock is enabled after the start-up time