4.17.16.31 PMC PLL Interrupt Mask Register

This register can only be written if the WPITEN bit is cleared in the PMC Write Protection Mode Register.

Name:	PMC_PLL_IMR
Offset:	0x00E8
Reset:	0x00000000
Property:	Read-only


Bit	31	30	29	28	27	26	25	24

Access
Reset


Bit	23	22	21	20	19	18	17	16
					UNLOCKLV	UNLOCKAU	UNLOCKU	UNLOCKA
Access					R	R	R	R
Reset					0	0	0	0


Bit	15	14	13	12	11	10	9	8

Access
Reset


Bit	7	6	5	4	3	2	1	0
					LOCKLV	LOCKAU	LOCKU	LOCKA
Access					R	R	R	R
Reset					0	0	0	0

Bit 19 – UNLOCKLV LVDS PLL Unlock Interrupt Mask

Bit 18 – UNLOCKAU AUDIO PLL Unlock Interrupt Mask

Bit 17 – UNLOCKU UPLL Unlock Interrupt Mask

Bit 16 – UNLOCKA PLLA Unlock Interrupt Mask

Bit 3 – LOCKLV LVDS PLL Lock Interrupt Mask

Bit 2 – LOCKAU AUDIO PLL Lock Interrupt Mask

Bit 1 – LOCKU UPLL Lock Interrupt Mask

Bit 0 – LOCKA PLLA Lock Interrupt Mask

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