19.8 Register Description

Registers can be 8, 16, or 32 bits wide. Atomic 8-, 16-, and 32-bit accesses are supported. In addition, the 8-bit quarters and 16-bit halves of a 32-bit register, and the 8-bit halves of a 16-bit register can be accessed directly.

Some registers can be write-protected optionally by the Peripheral Access Controller (PAC). This is denoted by the property "PAC Write-Protection" in each individual register description. Refer to the 19.5.8 Register Access Protection for details.

On SAM L11 devices, this peripheral has different access permissions depending on PAC Security Attribution (Secure or Non-Secure):
  • If the peripheral is configured as Non-Secure in the PAC:
    • Secure access and Non-Secure access are granted
  • If the peripheral is configured as Secure in the PAC:
    • Secure access is granted
    • Non-Secure access is discarded (Write is ignored, read 0x0) and a PAC error is triggered
Refer to Peripherals Security Attribution for more information.