4.1 Multiplexed Signals

Each pin is controlled by the I/O Pin Controller (PORT) as a general purpose I/O and alternatively can be assigned to one of the peripheral functions: A, B, C, D, E, G, H, or I.

The following table describes the peripheral signals multiplexed to the PORT I/O pins.

The column “Reset State” indicates the reset state of the line with mnemonics:
  • "I/O" or "Function" indicates whether the I/O pin resets in I/O mode or in peripheral function mode.
  • “I” / ”O” / "Hi-Z" indicates whether the I/O is configured as an input, output or is tri-stated.
  • “PU” / “PD” indicates whether pullup, pulldown or nothing is enabled.
Table 4-1. Pinout Multiplexing
PinPin NameSupplyAB(1)C(2)(3)D(2)(3)EGHIReset State
SSOP24VQFN24WLCSP32TQFP32/VQFN32EICREFADCACPTCDACOPAMPSERCOMSERCOM ALTERNATIVETCRTC/DebugAC/GCLKCCL
52A21PA00 / XIN32VDDANAEXTINT[0]XY[0]OA1NEGSERCOM1/PAD[0]TC2/WO[0]I/O, Hi-Z
63A32PA01 / XOUT32VDDANAEXTINT[1]XY[1]OA1POSSERCOM1/PAD[1]TC2/WO[1]I/O, Hi-Z
74A43PA02VDDANAEXTINT[2]AIN[0]XY[2]VOUTOA0NEGSERCOM0/PAD[2]I/O, Hi-Z
85B34PA03VDDANAEXTINT[3]VREFAAIN[1]XY[3]OA2NEGSERCOM0/PAD[3]I/O, Hi-Z
96B45PA04VDDANAEXTINT[4]VREFBAIN[2]AIN[0]OA2OUTSERCOM0/PAD[0]TC0/WO[0]IN[0]I/O, Hi-Z
107A56PA05VDDANAEXTINT[5]AIN[3]AIN[1]XY[4]OA2POSSERCOM0/PAD[1]TC0/WO[1]IN[1]I/O, Hi-Z
C47PA06VDDANAEXTINT[6]AIN[4]AIN[2]XY[5]OA0POSSERCOM0/PAD[2]TC1/WO[0]IN[2]I/O, Hi-Z
B58PA07VDDANAEXTINT[7]AIN[5]AIN[3]OA0OUTSERCOM0/PAD[3]TC1/WO[1]OUT[0]I/O, Hi-Z
118B69VDDANA-
129C610GNDANA-
1310D411PA08VDDIONMIAIN[6]XY[6]SERCOM1/PAD[0]SERCOM2/PAD[0]RTC/IN[0]IN[3]I/O, Hi-Z
D612PA09VDDIOEXTINT[0]AIN[7]XY[7]SERCOM1/PAD[1]SERCOM2/PAD[1]RTC/IN[1]IN[4]I/O, Hi-Z
C513PA10VDDIOEXTINT[1]AIN[8]XY[8]SERCOM1/PAD[2]SERCOM2/PAD[2]GCLK_IO[4]IN[5]I/O, Hi-Z
D514PA11VDDIOEXTINT[2]AIN[9]XY[9]SERCOM1/PAD[3]SERCOM2/PAD[3]GCLK_IO[3]OUT[1]I/O, Hi-Z
1411E615PA14 / XOSCVDDIOEXTINT[3]XY[10]SERCOM2/PAD[2]SERCOM0/PAD[2]TC0/WO[0]GCLK_IO[0]I/O, Hi-Z
1512E516PA15 / XOUTVDDIOEXTINT[4]XY[11]SERCOM2/PAD[3]SERCOM0/PAD[3]TC0/WO[1]GCLK_IO[1]I/O, Hi-Z
1613D317PA16(4)VDDIOEXTINT[5]XY[12]SERCOM1/PAD[0]SERCOM0/PAD[0]RTC/IN[2]GCLK_IO[2]IN[0]I/O, Hi-Z
1714F518PA17(4)VDDIOEXTINT[6]XY[13]SERCOM1/PAD[1]SERCOM0/PAD[1]RTC/IN[3]GCLK_IO[3]IN[1]I/O, Hi-Z
1815E419PA18VDDIOEXTINT[7]XY[14]SERCOM1/PAD[2]SERCOM0/PAD[2]TC2/WO[0]RTC/OUT[0]AC/CMP[0]IN[2]I/O, Hi-Z
1916E320PA19VDDIOEXTINT[0]XY[15]SERCOM1/PAD[3]SERCOM0/PAD[3]TC2/WO[1]RTC/OUT[1]AC/CMP[1]OUT[0]I/O, Hi-Z
2017F421PA22(4)VDDIOEXTINT[1]XY[16]SERCOM0/PAD[0]SERCOM2/PAD[0]TC0/WO[0]RTC/OUT[2]GCLK_IO[2]I/O, Hi-Z
2118F322PA23(4)VDDIOEXTINT[2]XY[17]SERCOM0/PAD[1]SERCOM2/PAD[1]TC0/WO[1]RTC/OUT[3]GCLK_IO[1]I/O, Hi-Z
F223PA24VDDIOEXTINT[3]SERCOM0/PAD[2]SERCOM2/PAD[2]TC1/WO[0]I/O, Hi-Z
E224PA25VDDIOEXTINT[4]SERCOM0/PAD[3]SERCOM2/PAD[3]TC1/WO[1]I/O, Hi-Z
D225PA27VDDIOEXTINT[5]GCLK_IO[0]I/O, Hi-Z
2219C226RESETVDDIOI, PU
2320E127VDDCORE-
2421D128GND-
122C129VDDOUT-
223B130VDDIO-
324B231PA30 / SWCLKVDDIOEXTINT[6]XY[18]SERCOM1/PAD[2]TC1/WO[0]SWCLKGCLK_IO[0]IN[3]SWCLK, I, PU
41C332PA31 / SWDIO(4)VDDIOEXTINT[7]XY[19]SERCOM1/PAD[3]TC1/WO[1]OUT[1]I/O, Hi-Z
  1. All analog pin functions are on the peripheral function B. The peripheral function B must be selected to disable the digital control of the pin.
  2. Refer to SERCOM Features to get the list of the supported features for each SERCOM instance.
  3. 24-pin packages only have two SERCOM instances: SERCOM0 and SERCOM1.
  4. The following pins are High Sink pins and have different properties than standard pins: PA16, PA17, PA22, PA23 and PA31.