46.6 Maximum Clock Frequencies

Table 46-6. Maximum GCLK Generator Output Frequencies(1)
SymbolDescriptionConditionsFmaxUnits
PL0PL2
Fgclkgen[0:2]GCLK Generator output Frequency-2496MHz
Fgclkgen[3:4]-1248MHz
Note:
  1. These values are based on simulation. They are not covered by production test limits or characterization.
Table 46-7. Maximum Peripheral Clock Frequencies(1)
SymbolDescriptionConditionsFmax.Units
PL0PL2
fCPUCPU clock frequency-832MHz
fAHBAHB clock frequency-832MHz
fAPBAAPBA clock frequency-832MHz
fAPBBAPBB clock frequency-
fAPBCAPBC clock frequency-
fGCLK_DFLLULPDFLLULP Reference clock frequency-3333kHz
fGCLK_DPLLFDPLL96M Reference clock frequency-22MHz
fGCLK_DPLL_32KFDPLL96M 32K clock frequency-32.76832.768kHz
fGCLK_EICEIC input clock frequency-1248MHz
fGCLK_EVSYS_CHANNEL_0EVSYS channel 0 input clock frequency-1248MHz
fGCLK_EVSYS_CHANNEL_1EVSYS channel 1 input clock frequency-
fGCLK_EVSYS_CHANNEL_2EVSYS channel 2 input clock frequency-
fGCLK_EVSYS_CHANNEL_3EVSYS channel 3 input clock frequency-
fGCLK_SERCOM0_SLOWCommon SERCOM0 slow input clock frequency-15MHz
fGCLK_SERCOM1_SLOWCommon SERCOM1 slow input clock frequency-
fGCLK_SERCOM2_SLOWCommon SERCOM2 slow input clock frequency-
fGCLK_SERCOM0_CORESERCOM0 input clock frequency-1248MHz
fGCLK_SERCOM1_CORESERCOM1 input clock frequency-
fGCLK_SERCOM2_CORESERCOM2 input clock frequency-
fGCLK_TC0TC0 input clock frequency-1248MHz
fGCLK_TC1TC1 input clock frequency-
f GCLK_TC2TC2 input clock frequency-
fGCLK_ADCADC input clock frequency-1248MHz
fGCLK_ACAC digital input clock frequency-
fGCLK_DACDAC input clock frequency-
fGCLK_FREQM_MSRFREQM measured clock frequency-
fGCLK_FREQM_REFFREQM reference clock frequency-
fGCLK_PTCPTC input clock frequency-
fGCLK_CCLCCL input clock frequency-
fGCLKinExternal GCLK input clock frequency-
Note:
  1. These values are based on simulation. They are not covered by production test limits or characterization.