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Ultra Low-Power, 32-bit Cortex-M23 MCUs with TrustZone, Crypto, and Enhanced PTC

ATSAML10D14A ATSAML10D15A ATSAML10D16A ATSAML10E14A ATSAML10E15A ATSAML10E16A ATSAML11D14A ATSAML11D15A ATSAML11D16A ATSAML11E14A ATSAML11E15A ATSAML11E16A

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15 PAC - Peripheral Access Controller
15.4 Product Dependencies
15.4.7 Debug Operation

Features
1 Configuration Summary
2 Ordering Information
3 Block Diagram
4 Pinouts
5 Signal Descriptions List
6 Power Considerations
7 Analog Peripherals Considerations
8 Device Startup
9 Product Mapping
10 Memories
11 Processor and Architecture
12 Peripherals Configuration Summary
13 SAM L11 Specific Security Features
14 Boot ROM
15 PAC - Peripheral Access Controller
16 Device Service Unit (DSU)
17 Clock System
18 GCLK - Generic Clock Controller
19 MCLK – Main Clock
20 FREQM – Frequency Meter
21 RSTC – Reset Controller
22 PM – Power Manager
23 OSCCTRL – Oscillators Controller
24 OSC32KCTRL – 32KHz Oscillators Controller
25 SUPC – Supply Controller
26 WDT – Watchdog Timer
27 RTC – Real-Time Counter
28 DMAC – Direct Memory Access Controller
29 EIC – External Interrupt Controller
30 NVMCTRL – Nonvolatile Memory Controller
31 TrustRAM (TRAM)
32 PORT - I/O Pin Controller
33 EVSYS – Event System
34 SERCOM – Serial Communication Interface
35 SERCOM USART - SERCOM Synchronous and Asynchronous Receiver and Transmitter
36 SERCOM SPI – SERCOM Serial Peripheral Interface
37 SERCOM I²C – SERCOM Inter-Integrated Circuit
38 TC – Timer/Counter
39 TRNG – True Random Number Generator
40 CCL – Configurable Custom Logic
41 ADC – Analog-to-Digital Converter
42 AC – Analog Comparators
43 DAC – Digital-to-Analog Converter
44 OPAMP – Operational Amplifier Controller
45 PTC - Peripheral Touch Controller
46 Electrical Characteristics
47 125°C Electrical Characteristics
48 AEC-Q100 Grade (-40°C to 125°C) Electrical Characteristics
49 AC and DC Characteristics Graphs
50 Packaging Information
51 Schematic Checklist
52 Conventions
53 Acronyms and Abbreviations
54 Appendix A: Migrating From SAM L21 to SAM L10/L11 (32-pin Package)
55 Appendix B: Migrating From SAM D20/D21 to SAM L10/L11 (32-pin Package)
56 Revision History
Legal Disclaimer
Microchip Information

15.4.7 Debug Operation

When the CPU is halted in Debug mode, write protection of all peripherals is disabled and the PAC continues normal operation.

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