29.3 I2C Mode Overview
The Inter-Integrated Circuit (I2C) bus is a multi-host serial data communication bus. Devices communicate in a host/client environment where the host devices initiate the communication. A client device is controlled through addressing. The following two diagrams show block diagrams of the I2C Host and Client modes, respectively.
The I2C bus specifies two signal connections:
- Serial Clock (SCL)
- Serial Data (SDA)
Both the SCL and SDA connections are bidirectional open-drain lines, each requiring pull-up resistors for the supply voltage. Pulling the line to ground is considered a logical zero and letting the line float is considered a logical one.
The following diagram shows a typical connection between two processors configured as host and client devices.
The I2C bus can operate with one or more host devices and one or more client devices.
There are four potential modes of operation for a given device:
- Host Transmit mode (host is transmitting data to a client)
- Host Receive mode (host is receiving data from a client)
- Client Transmit mode (client is transmitting data to a host)
- Client Receive mode (client is receiving data from the host)
To begin communication, a host device starts out in Host Transmit mode. The host device sends out a Start bit followed by the address byte of the client it intends to communicate with. This is followed by a single Read/Write bit, which determines whether the host intends to transmit to or receive data from the client device.
If the requested client exists on the bus, it will respond with an Acknowledge bit, otherwise known as an ACK. The host then continues in either Transmit mode or Receive mode and the client continues in the complement, either in Receive mode or Transmit mode, respectively.
A Start bit is indicated by a high-to-low transition of the SDA line while the SCL line is held high. Address and data bytes are sent out, Most Significant bit (MSb) first. The Read/Write bit is sent out as a logical one when the host intends to read data from the client, and is sent out as a logical zero when it intends to write data to the client.
The Acknowledge (ACK) bit is an active-low signal, which holds the SDA line low to indicate to the transmitter that the client device has received the transmitted data and is ready to receive more.
The transition of a data bit is always performed while the SCL line is held low. Transitions that occur while the SCL line is held high are used to indicate Start and Stop bits.
If the host intends to write to the client, then it repeatedly sends out a byte of data, with the client responding after each byte with an ACK bit. In this example, the host device is in Host Transmit mode and the client is in Client Receive mode.
If the host intends to read from the client, then it repeatedly receives a byte of data from the client, and responds after each byte with an ACK bit. In this example, the host device is in Host Receive mode and the client is in Client Transmit mode.
On the last byte of data communicated, the host device may end the transmission by sending a Stop bit. If the host device is in Receive mode, it sends the Stop bit in place of the last ACK bit. A Stop bit is indicated by a low-to-high transition of the SDA line while the SCL line is held high.
In some cases, the host may want to maintain control of the bus and re-initiate another transmission. If so, the host device may send another Start bit in place of the Stop bit or last ACK bit when it is in Receive mode.
The I2C bus specifies three message protocols:
- Single message where a host writes data to a client
- Single message where a host reads data from a client
- Combined message where a host initiates a minimum of two writes, or two reads, or a combination of writes and reads, to one or more clients
When one device is transmitting a logical one, or letting the line float, and a second device is transmitting a logical zero, or holding the line low, the first device can detect that the line is not a logical one. This detection, when used on the SCL line, is called clock stretching. Clock stretching gives client devices a mechanism to control the flow of data. When this detection is used on the SDA line, it is called arbitration. Arbitration ensures that there is only one host device communicating at any single time.