38.13.15 CxTEFCON

CAN Transmit Event FIFO Control Register

Note:

The individual bytes in this multibyte register can be accessed with the following register names:
- CxTEFCONT: Accesses the top byte TEFCON[31:24]
- CxTEFCONU: Accesses the upper byte TEFCON[23:16]
- CxTEFCONH: Accesses the high byte TEFCON[15:8]
- CxTEFCONL: Accesses the low byte TEFCON[7:0]
These bits can only be modified in Configuration mode (OPMOD[2:0] = 100.

Name:	CxTEFCON
Offset:	0x0140


Bit	31	30	29	28	27	26	25	24
				FSIZE[4:0]
Access				R/W	R/W	R/W	R/W	R/W
Reset				0	0	0	0	0


Bit	23	22	21	20	19	18	17	16

Access
Reset


Bit	15	14	13	12	11	10	9	8
						FRESET		UINC
Access						S/HC		S/HC
Reset						1		0


Bit	7	6	5	4	3	2	1	0
			TEFTSEN		TEFOVIE	TEFFIE	TEFHIE	TEFNEIE
Access			R/W		R/W	R/W	R/W	R/W
Reset			0		0	0	0	0

Bits 28:24 – FSIZE[4:0] FIFO Size⁽²⁾

Value	Description
11111	FIFO is 32 messages deep
00010	FIFO is 3 messages deep
00001	FIFO is 2 messages deep
00000	FIFO is 1 message deep

Bit 10 – FRESET FIFO Reset

Value	Description
1	FIFO will be reset when bit is set, cleared by hardware when FIFO is reset; the user needs to poll whether this bit is clear before taking any action
0	No effect

Bit 8 – UINC Increment Tail

Value	Description
1	When this bit is set, the FIFO tail will increment by a single message
0	FIFO tail will not increment

Bit 5 – TEFTSEN Transmit Event FIFO Timestamp Enable⁽²⁾

Value	Description
1	Timestamps elements in TEF
0	Does not timestamp elements in TEF

Bit 3 – TEFOVIE Transmit Event FIFO Overflow Interrupt Enable

Value	Description
1	Interrupt is enabled for overflow event
0	Interrupt is disabled for overflow event

Bit 2 – TEFFIE Transmit Event FIFO Full Interrupt Enable

Value	Description
1	Interrupt is enabled for FIFO full
0	Interrupt is disabled for FIFO full

Bit 1 – TEFHIE Transmit Event FIFO Half Full Interrupt Enable

Value	Description
1	Interrupt is enabled for FIFO half full
0	Interrupt is disabled for FIFO half full

Bit 0 – TEFNEIE Transmit Event FIFO Not Empty Interrupt Enable

Value	Description
1	Interrupt is enabled for FIFO not empty
0	Interrupt is disabled for FIFO not empty

The individual bytes in this multibyte register can be accessed with the following register names: CxTEFCONT: Accesses the top byte TEFCON[31:24] CxTEFCONU: Accesses the upper byte TEFCON[23:16] CxTEFCONH: Accesses the high byte TEFCON[15:8] CxTEFCONL: Accesses the low byte TEFCON[7:0] These bits can only be modified in Configuration mode (OPMOD[2:0] = 100.