38.13.3 CxTBC

CAN Time Base Counter Register

Note:

The individual bytes in this multibyte register can be accessed with the following register names:
- CxTBCT: Accesses the top byte TBC[31:24]
- CxTBCU: Accesses the upper byte TBC[23:16]
- CxTBCH: Accesses the high byte TBC[15:8]
- CxTBCL: Accesses the low byte TBC[7:0]
The Time Base Counter (TBC will be stopped and reset when TBCEN = 0 to save power).
The TBC prescaler count will be reset on any write to CxTBC (TBCPREx will be unaffected).

Name:	CxTBC
Offset:	0x0110


Bit	31	30	29	28	27	26	25	24
	TBC[31:24]
Access	R/W	R/W	R/W	R/W	R/W	R/W	R/W	R/W
Reset	0	0	0	0	0	0	0	0


Bit	23	22	21	20	19	18	17	16
	TBC[23:16]
Access	R/W	R/W	R/W	R/W	R/W	R/W	R/W	R/W
Reset	0	0	0	0	0	0	0	0


Bit	15	14	13	12	11	10	9	8
	TBC[15:8]
Access	R/W	R/W	R/W	R/W	R/W	R/W	R/W	R/W
Reset	0	0	0	0	0	0	0	0


Bit	7	6	5	4	3	2	1	0
	TBC[7:0]
Access	R/W	R/W	R/W	R/W	R/W	R/W	R/W	R/W
Reset	0	0	0	0	0	0	0	0

Bits 31:0 – TBC[31:0] CAN Time Base Counter

This is a free-running timer that increments every TBCPRE[9:0] clock when TBCEN is set

The individual bytes in this multibyte register can be accessed with the following register names: CxTBCT: Accesses the top byte TBC[31:24] CxTBCU: Accesses the upper byte TBC[23:16] CxTBCH: Accesses the high byte TBC[15:8] CxTBCL: Accesses the low byte TBC[7:0] The Time Base Counter (TBC will be stopped and reset when TBCEN = 0 to save power). The TBC prescaler count will be reset on any write to CxTBC (TBCPREx will be unaffected).