38.13.7 CxRXIF

CAN Receive Interrupt Status Register
Note:
  1. The individual bytes in this multibyte register can be accessed with the following register names:
    • CxRXIFT: Accesses the top byte RXIF[31:24]
    • CxRXIFU: Accesses the upper byte RXIF[23:16]
    • CxRXIFH: Accesses the high byte RXIF[15:8]
    • CxRXIFL: Accesses the low byte RXIF[7:0]
  2. RFIFx is the ‘or’ of all enabled RX FIFO flags (individual flags need to be cleared in the FIFO register).
Name: CxRXIF
Offset: 0x0120

Bit 3130292827262524 
          
Access  
Reset  
Bit 2322212019181716 
          
Access  
Reset  
Bit 15141312111098 
          
Access  
Reset  
Bit 76543210 
     RFIF[2:0]  
Access RRR 
Reset 000 

Bits 3:1 – RFIF[2:0] Receive FIFO Interrupt Pending

ValueDescription
1 One or more enabled receive FIFO interrupts are pending for the respective FIFO
0 No enabled receive FIFO interrupts for the respective FIFO are pending
The individual bytes in this multibyte register can be accessed with the following register names: CxRXIFT: Accesses the top byte RXIF[31:24] CxRXIFU: Accesses the upper byte RXIF[23:16] CxRXIFH: Accesses the high byte RXIF[15:8] CxRXIFL: Accesses the low byte RXIF[7:0] RFIFx is the ‘or’ of all enabled RX FIFO flags (individual flags need to be cleared in the FIFO register).