5.2 Supported Families

Microchip's Libero® Integrated Design Environment (IDE) and Designer software support the following families of devices:

IGLOO
ProASIC3
SmartFusion
Fusion
ProASIC ^PLUS
ProASIC
Axcelerator
eX
SX-A
MX
RTAX-S/SL
RTSX-SU

When we specify a family name, we refer to the device family and all its derivatives, unless otherwise specified. See the table below for a list of supported device families and their derivatives:

Table 5-1. Microchip's Product Families and Derivatives
Device Family	Family Derivatives	Description
IGLOO	IGLOO	The ultra-low-power, programmable solution.
	IGLOOe	Higher density IGLOO FPGAs with six PLLs and additional I/O standards.
	IGLOO nano	The industry’s lowest power, smallest size solution.
	IGLOO PLUS	The low-power FPGA with enhanced I/O capabilities.
ProASIC3	ProASIC3	The low-power, low-cost, FPGA solution.
ProASIC3	ProASIC3®E	Higher density ProASIC3 FPGAs with six PLLs and additional I/O standards.

Table 5-2. Microchip's Product Families and Derivatives
Device Family	Family Derivatives	Description
	ProASIC3 nano	Lowest cost solution with enhanced I/O capabilities.
	ProASIC3L	The FPGA that balances low power, performance, and low cost.
	Automotive ProASIC3	ProASIC3 FPGAs qualified for automotive applications.
	Military ProASIC3/EL	Military temperature A3PE600L, A3P1000, and A3PE3000L.
	RT ProASIC3	Radiation-tolerant RT3PE600L and RT3PE3000L.
SmartFusion	SmartFusion	SmartFusion intelligent mixed-signal FPGAs are the only devices that integrate an FPGA, ARM Cortex-M3, and programmable analog, offering full customization and IP protection.
Fusion	Fusion	Mixed-signal FPGA integrating ProASIC3 FPGA fabric, programmable analog block, support for ARM® Cortex^TM-M1 soft processors, and flash memory into a monolithic device.
ProASIC PLUS	ProASIC PLUS	Second-generation, high-density programmable flash devices with ASIC capabilities in a single-chip (75 k to 1 million gates).
ProASIC	ProASIC	This family has been discontinued and it is not recommended for new designs.
Axcelerator	Axcelerator	Nonvolatile, high-speed antifuse FPGAs with FuseLock™ design security and embedded FIFO controller (125 k to 2 million gates).
eX	eX	Third-generation, low power, low density antifuse devices based on the SX-A architecture with greater than 350 MHz performance (3 k to 12 k gates).

Table 5-3. Microchip's Product Families and Derivatives
Device Family	Family Derivatives	Description
SX-A	SX-A	Antifuse devices with 270 MHz system performance and sea-of-modules architecture enabled by Microchip's patented metal-to-metal antifuse interconnect elements (12 k to 108 k gates).
MX	MX	Antifuse devices with 250 MHz system performance and MultiPlex I/O, an architectural feature that supports mixed-voltage systems and delivers high-performance operation at 5.0 V (3 k to 54 k gates).
RTAX-S/SL	RTAX-S/SL	New generation of high-reliable, radiation-tolerant, antifuse-based FPGAs, designed for space applications with greater than 350 MHz system performance (250 k to 4 million system gates).
RTSX-SU	RTSX-SU	High-reliable, radiation-tolerant antifuse-based FPGAs with 250 MHz system performance (48 k to 108 k system gates).