35.7.13 Interrupt Flag Status and Clear


Bit	31	30	29	28	27	26	25	24

Access
Reset


Bit	23	22	21	20	19	18	17	16
					MC3	MC2	MC1	MC0
Access					R/W	R/W	R/W	R/W
Reset					0	0	0	0


Bit	15	14	13	12	11	10	9	8
	FAULT1	FAULT0	FAULTB	FAULTA	DFS	UFS
Access	R/W	R/W	R/W	R/W	R/W	R/W
Reset	0	0	0	0	0	0


Bit	7	6	5	4	3	2	1	0
					ERR	CNT	TRG	OVF
Access					R/W	R/W	R/W	R/W
Reset					0	0	0	0

Bits 16, 17, 18, 19 – MCx Match or Capture Channel x Interrupt Flag [x = 3..0]

This flag is set after a match with the compare condition or once CCx register contain a valid capture value, and will generate an interrupt request if INTENSET.MCx=1.

Writing a '0' to one of these bits has no effect.

Writing a '1' to one of these bits will clear the corresponding Match or Capture Channel x interrupt flag

In Capture operation, this flag is automatically cleared when CCx register is read.

Bit 15 – FAULT1 Non-Recoverable Fault 1 Interrupt Flag

This flag is set after a Non-Recoverable Fault 1 occurs, and will generate an interrupt request if INTENSET.FAULT1=1.

Writing a '0' to this bit has no effect.

Writing a '1' to this bit clears the Non-Recoverable Fault 1 interrupt flag.

Bit 14 – FAULT0 Non-Recoverable Fault 0 Interrupt Flag

This flag is set after a Non-Recoverable Fault 0 occurs, and will generate an interrupt request if INTENSET.FAULT0=1.

Writing a '0' to this bit has no effect.

Writing a '1' to this bit will clear the Non-Recoverable Fault 0 Interrupt flag.

Bit 13 – FAULTB Recoverable Fault B Interrupt Flag

This flag is set after a Recoverable Fault B occurs, and will generate an interrupt request if INTENSET.FAULTB =1.

Writing a '0' to this bit has no effect.

Writing a '1' to this bit clears the Recoverable Fault B interrupt flag.

Bit 12 – FAULTA Recoverable Fault A Interrupt Flag

This flag is set after a Recoverable Fault A occurs, and will generate an interrupt request if INTENSET.FAULTA=1.

Writing a '0' to this bit has no effect.

Writing a '1' to this bit clears the Recoverable Fault A interrupt flag.

Bit 11 – DFS Non-Recoverable Debug Fault State Interrupt Flag

This flag is set after an Debug Fault State occurs, and will generate an interrupt request if INTENSET.DFS=1.

Writing a '0' to this bit has no effect.

Writing a '1' to this bit clears the Debug Fault State interrupt flag.

Bit 10 – UFS Non-Recoverable Update Fault

This flag is set when the RAMP index changes and the Lock Update bit is set (CTRLBSET.LUPD), and will generate an interrupt request if INTENSET.UFS=1.

Writing a zero to this bit has no effect.

Writing a one to this bit clears the Non-Recoverable Update Fault interrupt flag.

Bit 3 – ERR Error Interrupt Flag

This flag is set if a new capture occurs on a channel when the corresponding Match or Capture Channel x interrupt flag is one. In which case there is nowhere to store the new capture. It will generate an interrupt request if INTENSET.ERR=1.

Writing a '0' to this bit has no effect.

Writing a '1' to this bit clears the error interrupt flag.

Bit 2 – CNT Counter Interrupt Flag

This flag is set after a counter event occurs, and will generate an interrupt request if INTENSET.CNT=1.

Writing a '0' to this bit has no effect.

Writing a '1' to this bit clears the CNT interrupt flag.

Bit 1 – TRG Retrigger Interrupt Flag

This flag is set after a counter retrigger occurs, and will generate an interrupt request if INTENSET.TRG=1.

Writing a '0' to this bit has no effect.

Writing a '1' to this bit clears the re-trigger interrupt flag.

Bit 0 – OVF Overflow Interrupt Flag

This flag is set after an overflow condition occurs, and will generate an interrupt request if INTENSET.OVF=1.

Writing a '0' to this bit has no effect.

Writing a '1' to this bit clears the Overflow interrupt flag.

Name:	INTFLAG
Offset:	0x2C
Reset:	0x00000000
Property:	-