5.10.4 LIN TRX Operation Mode Control Register
| Name: | LOPMCR |
| Offset: | 0x02 |
| Reset: | 0x01 |
| Property: | R/W |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| Reserved[7:2] | LOPM [1:0] | ||||||||
| Access | R | R | R | R | R | R | R/W | R/W | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | |
Bits 7:2 – Reserved[7:2]
(Submit Feedback)Reserved, do not modify reset value!
Bits 1:0 – LOPM [1:0]
(Submit Feedback)| Value | Description |
|---|---|
| ‘2’b01’ | LIN Standby mode |
| ‘2’b10’ | LIN Normal mode |
| Other | Invalid mode selection |