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32.8.6 Busy Channels
Table 32-8. Register Bit Attribute
Legend Symbol Description Symbol Description Symbol Description R Readable bit HC Cleared by Hardware (Grey cell) Unimplemented W Writable bit HS Set by Hardware X Bit is unknown at Reset K Write to clear S Software settable bit — —
Name: BUSYCH Offset: 0x018 Reset: 0x00000000 Property: R
Bit 31 30 29 28 27 26 25 24 BUSYCH[31:24] Access R R R R R R R R Reset 0 0 0 0 0 0 0 0
Bit 23 22 21 20 19 18 17 16 BUSYCH[23:16] Access R R R R R R R R Reset 0 0 0 0 0 0 0 0
Bit 15 14 13 12 11 10 9 8 BUSYCH[15:8] Access R R R R R R R R Reset 0 0 0 0 0 0 0 0
Bit 7 6 5 4 3 2 1 0 BUSYCH[7:0] Access R R R R R R R R Reset 0 0 0 0 0 0 0 0
Bits 31:0 – BUSYCH[31:0] Busy Channel x
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