32.8.5 Interrupt Status Table 32-7. Register Bit Attribute LegendSymbolDescriptionSymbolDescriptionSymbolDescriptionRReadable bitHCCleared by Hardware(Grey cell)UnimplementedWWritable bitHSSet by HardwareXBit is unknown at ResetKWrite to clearSSoftware settable bit—— Name: INTSTATUSOffset: 0x014Reset: 0x00000000Property: RBit 3130292827262524 CHINT[31:24] Access RRRRRRRR Reset 00000000 Bit 2322212019181716 CHINT[23:16] Access RRRRRRRR Reset 00000000 Bit 15141312111098 CHINT[15:8] Access RRRRRRRR Reset 00000000 Bit 76543210 CHINT[7:0] Access RRRRRRRR Reset 00000000 Bits 31:0 – CHINT[31:0] Channel x Pending Interrupt
Bit 3130292827262524 CHINT[31:24] Access RRRRRRRR Reset 00000000 Bit 2322212019181716 CHINT[23:16] Access RRRRRRRR Reset 00000000 Bit 15141312111098 CHINT[15:8] Access RRRRRRRR Reset 00000000 Bit 76543210 CHINT[7:0] Access RRRRRRRR Reset 00000000
