27.7.4 Flag status
| Symbol | Description | Symbol | Description | Symbol | Description |
|---|---|---|---|---|---|
| R | Readable bit | HC | Cleared by Hardware | (Grey cell) | Unimplemented |
| W | Writable bit | HS | Set by Hardware | X | Bit is unknown at Reset |
| K | Write to clear | S | Software settable bit | — | — |
| Name: | STATUS |
| Offset: | 0x00C |
| Reset: | 0x00000000 |
| Property: | R |
| Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
| Access | |||||||||
| Reset |
| Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
| Access | |||||||||
| Reset |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| ADDVREGRDY[3:0] | |||||||||
| Access | R | R | R | R | |||||
| Reset | 0 | 0 | 0 | 0 | |||||
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| BORVDDUSB[2:0] | BORVDDIOB | ULDOOVHEAT | ULDORDY | LVDRDY | LVDET | ||||
| Access | R | R | R | R | R | R | R | R | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
Bits 11:8 – ADDVREGRDY[3:0] Additional Regulator ready x Status. One if voltage is OK. It corresponds to vreg_ready_mv signal of additional regulator.
Set by hardware when the voltage corresponding Additional Regulator is ok.
Bits 7:5 – BORVDDUSB[2:0] BORVDDUSB Status. One if VDDUSB is OK. It corresponds to bor_vddusb_n_mv signal of SMOR.
Set by hardware when VDD_USB is OK.
Bit 4 – BORVDDIOB BORVDDIOB Status. One if VDDIOB is OK. It corresponds to bor_vddiob_mv signal of SMOR.
Set by hardware when a Brown-Out has been detected for VDDIOB.
Bit 3 – ULDOOVHEAT User LDO Regulator OverHeat Status. It corresponds to vreg_overheat_event_mv signal from ULDO.
Set by hardware when the User LDO overheat condition is detected.
Bit 2 – ULDORDY User LDO regulator Status. It corresponds to vreg_ready_mv signal from ULDO.
Set by hardware when the User LDO is ready to operate.
Bit 1 – LVDRDY Low Voltage Detector Ready Status
Set by hardware when the Low Voltage Detector is ready.
Bit 0 – LVDET Low Voltage Detector Status.
Set to one if VDDIO crosses the threshold voltage in the “good” direction according to LVD.DIR.