27.7.6 BOR Control

Table 27-9. Register Bit Attribute Legend
Symbol	Description	Symbol	Description	Symbol	Description
R	Readable bit	HC	Cleared by Hardware	(Grey cell)	Unimplemented
W	Writable bit	HS	Set by Hardware	X	Bit is unknown at Reset
K	Write to clear	S	Software settable bit	—	—

Name:	BOR
Offset:	0x014
Reset:	0x00000000
Property:	RW


Bit	31	30	29	28	27	26	25	24

Access
Reset


Bit	23	22	21	20	19	18	17	16

Access
Reset


Bit	15	14	13	12	11	10	9	8
							BORFILT[1:0]
Access							RW	RW
Reset							0	0


Bit	7	6	5	4	3	2	1	0
		DCBORPSEL[2:0]						ACTION
Access		RW	RW	RW				RW
Reset		0	0	0				0

Bits 9:8 – BORFILT[1:0] BOR filtering

Value	Name	Description
0x0	NOFILT	No digital filtering
0x1	FILT32US	32us filtering
0x2	FILT125US	125us filtering
0x3	FILT250US	250us filtering

Bits 6:4 – DCBORPSEL[2:0] Duty Cycle BOR Prescaler Select

Value	Name	Description
0x0	NODIV	Not Divided
0x1	DIV2	Divide clock by 2
0x2	DIV4	Divide clock by 4
0x3	DIV8	Divide clock by 8
0x4	DIV16	Divide clock by 16
0x5	DIV32	Divide clock by 32
0x6	DIV64	Divide clock by 64
0x7	DIV128	Divide clock by 128

Bit 0 – ACTION Action when Threshold Crossed

Value	Name	Description
0x0	RESET	The BOR generates a reset
0x1	BBKUP	The BOR puts the device in battery backup sleep mode

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