31.1.11.2 Single Write Sequence

The smallest block of data that can be programmed with a single write either one Word or one DWord. The data to be programmed must be written to DATA0 (and DATA1 for DWord) before the programming sequence is initiated. The FCW programs the DATAn into the Word/DWord location pointed to by ADDR. ADDR is a byte address, so the lower 2 or 3 bits are ignored for Word or DWord programming, respectively.

A Word/DWord Program sequence typically comprises the following steps:

  1. <Desired NVMOP> is Single Write.
  2. Follow the Start Sequencer from Start Sequencer.
  3. Wait for NVM Interrupt from Interrupts.
  4. Check the INTFLAG bits to ensure that the program sequence completed successfully, and then clear all bits in INTFLAG. See Errors and Flags about error flags.

A Word/DWord within the Flash can be programmed if its associated page write protection is not enabled, see Debug Access Level.

Single Write Timing

Word/DWord Program timing is dominated by setup (Tnvs + Tpgs), program time (Tprog) and recovery (Trcv) delays. Using the timing shown in “Flash Timing Parameters” , total time to program one word is roughly shown below:

Word/DWord Program time = Tnvs + Tpgs + Tprog + Trcv + Trw

If Pre-Programming, the first step adds roughly:

Word/DWord Program time = Tpreprog + Tprepgh + Tprepgs

Note: For write timing, see the Non-Volatile Memory Controller (NVM) Electrical Specifications section in the Electrical Characteristics chapter.

Single Write and ECC

Single Writes are not allowed because of Flash ECC setting. The Interrupt Error Flag Summary table defines the interrupt flags that are set.