25.5.17 Transmit Data Register High Byte
Data written to this register is automatically loaded into the TX buffer and then transferred to the dedicated shift register. The shift register outputs each of the bits serially to the TXD pin for transmission.
When using a 9-bit frame size, the ninth bit (MSb) must be written to the Transmit Data Register High Byte (USARTn.TXDATAH). In that case, the buffer shifts data when either the Transmit Data Register Low Byte (USARTn.TXDATAL) or the Transmit Data Register High Byte (USARTn.TXDATAH) is written, depending on the configuration. The register, which does not lead to data being shifted, must be written first to be able to write both registers before shifting.
When the Character Size (CHSIZE) bit field in the Control D (USARTn.CTRLD) register is configured to 9-bit mode with low byte first, writing to the Transmit Data Register High Byte (TXDATAH) shifts the transmit buffer. In all other configurations, writing to the Transmit Data Register Low Byte (TXDATAL) shifts the buffer.
This register may only be written when the Data Register Empty Interrupt Flag (DRE) Interrupt Flag in the Interrupt Flags (USARTn.INTFLAGS) register is set.
| Name: | TXDATAH |
| Offset: | 0x13 |
| Reset: | 0x00 |
| Property: | - |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| DATA[8] | |||||||||
| Access | R/W | ||||||||
| Reset | 0 |
