34.1 DC Characteristics

Table 34-2. Operating MIPS vs. Voltage
V_DD Range	Temperature Range	Maximum CPU Clock Frequency
3.0V to 3.6V	-40°C to +150°C	70 MIPS

Table 34-3. Thermal Operating Conditions
Rating	Symbol	Min.	Max.	Unit
High-Temperature Devices
Operating Junction Temperature Range	T_J	-40	+165	°C
Operating Ambient Temperature Range	T_A	-40	+150	°C
Power Dissipation: Internal Chip Power Dissipation: Pint = V_DD x (I_DD – Σ I_OH)	P_D	P_INT + P_I/O		W
I/O Pin Power Dissipation: I/O = Σ ({V_DD – V_OH} x I_OH) + Σ (V_OL x I_OL)	P_D	P_INT + P_I/O		W
Maximum Allowed Power Dissipation	P_DMAX	(T_J – T_A)/θ_JA		W

Table 34-4. Thermal Packaging Characteristics⁽¹⁾
Characteristic	Symbol	Typ.	Unit
Package Thermal Resistance, 80-Pin TQFP 12x12x1 mm	θ_JA	50.67	°C/W
Package Thermal Resistance, 64-Pin TQFP 10x10x1.0 mm	θ_JA	45.7	°C/W
Package Thermal Resistance, 64-Pin QFN 9x9 mm	θ_JA	18.7	°C/W
Package Thermal Resistance, 48-Pin TQFP 7x7 mm	θ_JA	62.76	°C/W
Package Thermal Resistance, 48-Pin UQFN 6x6 mm	θ_JA	27.6	°C/W
Note: Junction to ambient thermal resistance, Theta-_JA (θ_JA) numbers are achieved by package simulations.

Table 34-5. Operating Voltage Specifications⁽²⁾
Operating Conditions: 3.0V to 3.6V (unless otherwise stated)⁽¹⁾ Operating temperature -40°C ≤ T_A ≤ +150°C
Param No.	Symbol	Characteristic	Min.	Typ.⁽²⁾	Max.	Units	Conditions
Operating Voltage
HDC10	V_DD	Supply Voltage	3.0	—	3.6	V
HDC11	AV_DD	Supply Voltage	Greater of: V_DD – 0.3 or 3.0	—	Lesser of: V_DD + 0.3 or 3.6	V	The difference between AV_DD supply and V_DD supply must not exceed ±300 mV at all times, including during device power-up
HDC16	V_POR	V_DD Start Voltage  to Ensure Internal  Power-on Reset Signal	—	—	V_SS	V
HDC17	SV_DD	V_DD Rise Rate  to Ensure Internal Power-on Reset Signal	0.03	—	—	V/ms	0V-3V in 100 ms
HBO10	V_BOR	BOR Event on V_DD Transition High-to-Low	2.68	2.84	2.99	V
Note: Device is functional at V_BORMIN < V_DD < V_DDMIN. Analog modules (ADC and comparators) may have degraded performance. Parameters are characterized but not tested.

Table 34-6. DC Characteristics: Operating Current (I_DD)⁽²⁾
Operating Conditions: 3.0V to 3.6V (unless otherwise stated) Operating temperature -40°C ≤ T_A ≤ +150°C
Parameter No.	Typ.⁽¹⁾	Max.	Units	Conditions
HDC20	16.5	33.5	mA	+150°C	3.3V	10 MIPS (N1 = 1, N2 = 5, N3 = 2,  M = 50, F_VCO = 400 MHz,  F_PLLO = 40 MHz)
HDC21	18.4	36	mA	+150°C	3.3V	20 MIPS (N1 = 1, N2 = 5, N3 = 1,  M = 50, F_VCO = 400 MHz,  F_PLLO= 80 MHz)
HDC22	22.7	40	mA	+150°C	3.3V	40 MIPS (N1 = 1, N2 = 3, N3 = 1,  M = 60, F_VCO = 480 MHz,  F_PLLO = 160 MHz)
HDC23	28.7	48	mA	+150°C	3.3V	70 MIPS (N1 = 1, N2 = 2, N3 = 1,  M = 70, F_VCO = 560 MHz,  F_PLLO = 280 MHz)
Note: Data in the “Typ.” column are for design guidance only and are not tested. Base Run current (I_DD) is measured as follows: Oscillator is switched to EC+PLL mode in software OSC1 pin is driven with external 8 MHz square wave with levels from 0.3V to V_DD– 0.3V OSC2 is configured as an I/O in the Configuration Words (OSCIOFNC (FOSC[2]) = `0`) FSCM is disabled (FCKSM[1:0] (FOSC[7:6]) = `01`) Watchdog Timer is disabled (FWDT[15] = `0` and WDTCONL[15] = `0`) All I/O pins (except OSC1) are configured as outputs and driving low No peripheral modules are operating or being clocked (defined PMDx bits are all ‘`1`’s) JTAG is disabled (JTAGEN (FICD[5]) = `0`) `NOP` instructions are executed in `while(1)` loop

Table 34-7. DC Characteristics: Idle Current (I_IDLE)⁽²⁾
Operating Conditions: 3.0V to 3.6V (unless otherwise stated) Operating temperature -40°C ≤ T_A ≤ +150°C
Param No.	Typ.⁽¹⁾	Max.	Units	Conditions
HDC40	15.4	33.3	mA	+150°C	3.3V	10 MIPS (N1 = 1, N2 = 5, N3 = 2, M = 50, F_VCO = 400 MHz, F_PLLO = 40 MHz)
HDC41	16.1	33.8	mA	+150°C	3.3V	20 MIPS (N1 = 1, N2 = 5, N3 = 1,  M = 50, F_VCO = 400 MHz, F_PLLO = 80 MHz)
HDC42	17.9	36.3	mA	+150°C	3.3V	40 MIPS (N1 = 1, N2 = 3, N3 = 1,  M = 60, F_VCO = 480 MHz, F_PLLO = 160 MHz)
HDC43	20.4	39.8	mA	+150°C	3.3V	70 MIPS (N1 = 1, N2 = 2, N3 = 1,  M = 70, F_VCO = 560 MHz, F_PLLO = 280 MHz)
Note: Data in the “Typ.” column are for design guidance only and are not tested. Base Idle current (I_IDLE) is measured as follows: Oscillator is switched to EC+PLL mode in software OSC1 pin is driven with external 8 MHz square wave with levels from 0.3V to V_DD – 0.3V OSC2 is configured as an I/O in the Configuration Words (OSCIOFNC (FOSC[2]) = `0`) FSCM is disabled (FCKSM[1:0] (FOSC[7:6]) = `01`) Watchdog Timer is disabled (FWDT[15] = `0` and WDTCONL[15] = `0`) All I/O pins (except OSC1) are configured as outputs and driving low No peripheral modules are operating or being clocked (defined PMDx bits are all ‘`1`’s) JTAG is disabled (JTAGEN (FICD[5]) = `0`) Flash in standby with NVMSIDL (NVMCON[12]) = `1`

Table 34-8. Power-Down Current (I_PD)⁽²⁾
Operating Conditions: 3.0V to 3.6V (unless otherwise stated) Operating temperature -40°C ≤ T_A ≤ +150°C
Parameter No.	Characteristic	Typ.⁽¹⁾	Max.	Units	Conditions
HDC60	Base Power-Down Current	11.6	29.2	mA	+150°C	3.3V
Note: Data in the “Typ.” column are for design guidance only and are not tested. I_PD (Sleep) current is measured as follows: CPU core is off, oscillator is configured in EC mode and External Clock is active; OSCI is driven with external square wave from rail-to-rail (EC clock overshoot/undershoot < 250 mV required) CLKO is configured as an I/O input pin in the Configuration Word All I/O pins are configured as output low MCLR = V_DD, WDT and FSCM are disabled All peripheral modules are disabled (PMDx bits are all set) The VREGS bit (RCON[8]) = `0` (i.e., core regulator is set to standby while the device is in Sleep mode) JTAG is disabled

Table 34-9. Doze Current (I_DOZE)
Operating Conditions: 3.0V to 3.6V (unless otherwise stated) Operating temperature -40°C ≤ T_A ≤ +150°C
Parameter No.	Typ.⁽¹⁾	Max.	Doze Ratio	Units	Conditions
HDC70	23.6	43	1:2	mA	+150°C	3.3V	70 MIPS (N = 1, N2 = 2, N3 = 1, M = 70, F_VCO = 560 MHz, F_PLLO = 280 MHz)
HDC70	18.5	38.7	1:128	mA	+150°C	3.3V
Note: Data in the “Typ.” column are for design guidance only and are not tested.

Table 34-10. Watchdog Timer Delta Current (ΔIWDT)⁽¹⁾
Operating Conditions: 3.0V to 3.6V (unless otherwise stated) Operating temperature -40°C ≤ T_A ≤ +150°C
Parameter No.	Typ.⁽¹⁾	Max.	Units		Conditions
HDC61	100	600	µA		+150°C	3.3V
Note: The ΔIWDT current is the additional current consumed when the module is enabled. This includes the LPRC/ BFRC clock source current. This current should be added to the base IPD current. All parameters are characterized but not tested during manufacturing.

Table 34-11. PWM Delta Current⁽¹⁾
Operating Conditions: 3.0V to 3.6V (unless otherwise stated) Operating temperature -40°C ≤ T_A ≤ +150°C
Parameter No.	Typ.	Max.	Units	Conditions
HDC100	7	10	mA	+150°C	3.3V	PWM Output Frequency = 500 kHz,  PWM Input (AF_PLLO = 500 MHz)  (AVCO = 1000 MHz, PLLFBD = 125, APLLDIV1 = 2)
HDC101	6	7.5	mA	+150°C	3.3V	PWM Output Frequency = 500 kHz,  PWM Input (AF_PLLO = 400 MHz) (AVCO = 400 MHz, PLLFBD = 50, APLLDIV1 = 1)
HDC102	3	4	mA	+150°C	3.3V	PWM Output Frequency = 500 kHz, PWM Input (AF_PLLO = 200 MHz) (AVCO = 400 MHz, PLLFBD = 50, APLLDIV1 = 2)
HDC103	2	2.5	mA	+150°C	3.3V	PWM Output Frequency = 500 kHz, PWM Input (AF_PLLO = 100 MHz) (AVCO = 400 MHz, PLLFBD = 50, APLLDIV1 = 4)
Note: APLL current is not included. The APLL current will be the same if more than one PWM is running. Listed delta currents are for only one PWM instance when HREN = `0` (PGxCONL[7]). All parameters are  characterized but not tested during manufacturing.

Table 34-12. APLL Delta Current
Operating Conditions: 3.0V to 3.6V (unless otherwise stated) Operating temperature -40°C ≤ T_A ≤ +150°C
Parameter No.	Typ.	Max.	Units	Conditions⁽¹⁾
HDC110	9	18	mA	+150°C	3.3V	AF_PLLO = 500 MHz (AVCO = 1000 MHz, PLLFBD = 125, APLLDIV1 = 2)
HDC111	6	9	mA	+150°C	3.3V	AF_PLLO = 400 MHz (AVCO = 400 MHz, PLLFBD = 50, APLLDIV1 = 1)
HDC112	5	8	mA	+150°C	3.3V	AF_PLLO = 200 MHz  (AVCO = 400 MHz, PLLFBD = 50, APLLDIV1 = 2)
HDC113	4	8	mA	+150°C	3.3V	AF_PLLO = 100 MHz  (AVCO = 400 MHz, PLLFBD = 50, APLLDIV1 = 4)
Note: The APLL current will be the same if more than one PWM or DAC is run to the APLL clock. All parameters are characterized but not tested during manufacturing.

Table 34-13. ADC Delta Current
Operating Conditions: 3.0V to 3.6V (unless otherwise stated) Operating temperature -40°C ≤ T_A ≤ +150°C
Parameter No.	Typ.	Max.		Units		Conditions
HDC120	—	8.5		mA		+150°C	3.3V	T_AD = 14.3 ns  (3.5 Msps conversion rate)

Table 34-14. Comparator + DAC Delta Current
Operating Conditions: 3.0V to 3.6V (unless otherwise stated) Operating temperature -40°C ≤ T_A ≤ +150°C
Parameter No.	Typ.	Max.	Units	Conditions
HDC130	—	5	mA	+150°C	3.3V	AF_PLLO@ 500 MHz⁽¹⁾
Note: APLL current is not included. Listed delta currents are for only one comparator + DAC instance. All  parameters are characterized but not tested during manufacturing.

Table 34-15. I/O Pin Input Specifications
Operating Conditions: 3.0V to 3.6V (unless otherwise stated) Operating temperature -40°C ≤ T_A ≤ +150°C
Param  No.	Symbol	Characteristic	Min.⁽⁴⁾	Typ.⁽¹⁾	Max.⁽⁵⁾	Units	Conditions
HDI50	I_IL	Input Leakage Current⁽²⁾
		I/O Pins 5V Tolerant⁽³⁾	-1500	—	1500	nA
		I/O Pins Not 5V Tolerant⁽³⁾	-700	—	700	nA
		MCLR	-1500	—	1500	nA
		OSCI	-750	—	750	nA	XT and HS modes
Note: Data in the “Typ.” column are at 3.3V, +25°C unless otherwise stated. Negative current is defined as current sourced by the pin. See the “Pin Diagrams” section for the 5V tolerant I/O pins. V_PIN = V_SS. V_PIN = V_DD.

Table 34-16. Internal FRC Accuracy
Operating Conditions: 3.0V to 3.6V (unless otherwise stated) Operating temperature -40°C ≤ T_A ≤ +150°C
Param No.	Characteristic	Min.	Max.	Units	Conditions
Internal FRC Accuracy @ FRC Frequency = 8 MHz⁽¹⁾
HF20	FRC	3	3	%	-40°C ≤ T_A ≤ +150°C
Note: Frequency is calibrated at +25°C and 3.3V.

Table 34-17. Internal LPRC Accuracy
Operating Conditions: 3.0V to 3.6V (unless otherwise stated) Operating temperature -40°C ≤ T_A ≤ +150°C
Param No.	Characteristic	Min.	Max.	Units	Conditions
LPRC @ 32 kHz
HF21	LPRC	-27	+27	%	-40°C ≤ T_A ≤ +150°C
		-25	+25	%	-40°C ≤ T_A ≤ 0°C
		-10	+10	%	0°C ≤ T_A ≤ +85°C
		-15	+15	%	+85°C ≤ T_A ≤ +125°C

Table 34-18. DACx Module Specifications
Operating Conditions: 3.0V to 3.6V (unless otherwise stated) Operating temperature -40°C ≤ T_A ≤ +150°C
Param No.	Symbol	Characteristic		Min.	Typ.⁽¹⁾	Max.	Units	Comments
HDA03	INL	Integral Nonlinearity Error		-50	—	0	LSB
HDA05	EOFF	Offset Error		-3.5	—	45	LSB	Internal node at comparator input
HDA06	EG	Gain Error		0	—	50	LSB	Internal node at comparator input
Note: Parameters are for design guidance only and are not tested in manufacturing.

DS70005452D

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