29 Power-Saving Features
Note: This data sheet summarizes the features
of the dsPIC33CK512MP608 family of devices. It is not intended to be a
comprehensive reference source. To complement the information in this data sheet, refer to
“Watchdog Timer and Power-Saving Modes” (www.microchip.com/DS70615) in the “dsPIC33/PIC24 Family Reference
Manual”.
The dsPIC33CK512MP608 family devices provide the ability to manage power consumption by selectively managing clocking to the CPU and the peripherals. In general, a lower clock frequency and a reduction in the number of peripherals being clocked constitutes lower consumed power.
dsPIC33CK512MP608 family devices can manage power consumption in four ways:
- Clock Frequency
- Instruction-Based Sleep and Idle modes
- Software-Controlled Doze mode
- Selective Peripheral Control in Software
Combinations of these methods can be used to selectively tailor an application’s power consumption while still maintaining critical application features, such as timing-sensitive communications.