3.6.3.2 9 x 9 Systolic FIR Filter

A 9 x 9 systolic FIR filter can be implemented using the 9 x 9 DOTP mode of the Math block, see Figure   1. In DOTP mode, two multipliers share the same output register. As a result, the latencies have to be adjusted properly on the input side to achieve correct filter operation.

Figure 3-10. 9 x 9 Systolic FIR Filter