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PolarFire Family Fabric User Guide
PolarFire Family Fabric User Guide
  1. Home
  2. 3 Math Blocks
  3. 3.6 Implementation
  4. 3.6.3 Use Models
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  • Introduction
  • 1 Logic Element and Routing
  • 2 Embedded Memory Blocks
  • 3 Math Blocks
    • 3.1 Features
    • 3.2 Math Block Resources
    • 3.3 Functional Description
    • 3.4 Cascading Math Blocks
    • 3.5 Operational Modes
    • 3.6 Implementation
      • 3.6.1 RTL Inference
      • 3.6.2 Math Block Macro
      • 3.6.3 Use Models
        • 3.6.3.1 Symmetric FIR Filter
        • 3.6.3.2 9 x 9 Systolic FIR Filter
        • 3.6.3.3 9 x 9 Symmetric FIR Filter
        • 3.6.3.4 9 x 9 Complex Multiplier
        • 3.6.3.5 Non-Pipelined 35 x 35 Multiplier Using Cascade Chain
        • 3.6.3.6 Pipelined 35 x 35 Multiplier Using Cascade Chain
        • 3.6.3.7 Non-Pipelined 35 x 35 Multiplier Using Fabric Adders
        • 3.6.3.8 Extension Adder
  • 4 Appendix: Supported Memory File Formats for LSRAM and μSRAM
  • 5 Appendix: Macro Configuration
  • 6 References
  • 7 Revision History
  • Microchip FPGA Support
  • Microchip Information

3.6.3 Use Models

(Ask a Question)

Math blocks can be used in a wide variety of DSP applications and this section describes the following use models:

  • Symmetric FIR Filter
  • 9 x 9 Systolic FIR Filter
  • 9 x 9 Symmetric FIR Filter
  • 9 x 9 Complex Multiplier
  • Non-Pipelined 35 x 35 Multiplier Using Cascade Chain
  • Pipelined 35 x 35 Multiplier Using Cascade Chain
  • Non-Pipelined 35 x 35 Multiplier Using Fabric Adders
  • Extension Adder

The online versions of the documents are provided as a courtesy. Verify all content and data in the device’s PDF documentation found on the device product page.

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