31.3.18.18 Flash ECC Fault Pointer Register
| Symbol | Description | Symbol | Description | Symbol | Description |
|---|---|---|---|---|---|
| R | Readable bit | HC | Cleared by Hardware | (Grey cell) | Unimplemented |
| W | Writable bit | HS | Set by Hardware | X | Bit is unknown at Reset |
| K | Write to clear | S | Software settable bit | — | — |
| Name: | FFLTPTR |
| Offset: | 0x0048 |
| Reset: | 0x00000000 |
| Property: | PAC Write Protection |
| Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
| FLT2PTR[8] | |||||||||
| Access | R/W | ||||||||
| Reset | 0 |
| Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
| FLT2PTR[7:0] | |||||||||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| FLT1PTR[8] | |||||||||
| Access | R/W | ||||||||
| Reset | 0 |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| FLT1PTR[7:0] | |||||||||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
Bits 24:16 – FLT2PTR[8:0] Fault 2 Injection Pointer
n = Inject fault at bit n. 0 ≤ n ≤ 265.
For details of calculation vector bit order vs data bit order vs control bit order see the Flash ECC Vector table.
Note: For values of n ≥ 266 the results will be undefined.
Bits 8:0 – FLT1PTR[8:0] Fault 1 Injection Pointer
n = Inject fault at bit n. 0 ≤ n ≤ 265.
For details of calculation vector bit order vs data bit order vs control bit order see the Flash ECC Vector table.
Note: For values of n ≥ 266 the results will be undefined.