36.5.18 SQI STATUS REGISTER 2
| Symbol | Description | Symbol | Description | Symbol | Description |
|---|---|---|---|---|---|
| R | Readable bit | HC | Cleared by Hardware | (Grey cell) | Unimplemented |
| W | Writable bit | HS | Set by Hardware | X | Bit is unknown at Reset |
| K | Write to clear | S | Software settable bit | — | — |
| Name: | STAT2 |
| Offset: | 0x130 |
| Reset: | 0x0000 |
| Property: | - |
| Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
| Access | |||||||||
| Reset |
| Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
| CMDSTAT[1:0] | |||||||||
| Access | R | R | |||||||
| Reset | 0 | 0 | |||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| CONAVAIL[3:1] | |||||||||
| Access | R | R | R | ||||||
| Reset | 0 | 0 | 0 | ||||||
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| CONAVAIL[0] | SQID3 | SQID2 | SQID1 | SQID0 | RXUN | TXOV | |||
| Access | R | R | R | R | R | R | R | ||
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
Bits 17:16 – CMDSTAT[1:0] Current Command Status bits <1:0>
These bits indicate the current command status.
| Value | Description |
|---|---|
| 11 | Reserved |
| 10 | Receive |
| 01 | Transmit |
| 00 | Idle |
Bits 10:7 – CONAVAIL[3:0] Control buffer Space Available bits <3:0>
These bits indicate the available control wordspace.
| Value | Description |
|---|---|
| 1000 | 8 words are available |
| 0111 | 7 words are available |
| 0001 | 1 word is available |
| 0000 | No words are available |
Bit 6 – SQID3 SQID3 Status bit
| Value | Description |
|---|---|
| 1 | Data is present on SQID3 |
| 0 | Data is not present on SQID3 |
Bit 5 – SQID2 SQID2 Status bit
| Value | Description |
|---|---|
| 1 | Data is present on SQID2 |
| 0 | Data is not present on SQID2 |
Bit 4 – SQID1 SQID1 Status bit
| Value | Description |
|---|---|
| 1 | Data is present on SQID1 |
| 0 | Data is not present on SQID1 |
Bit 3 – SQID0 SQID0 Status bit
| Value | Description |
|---|---|
| 1 | Data is present on SQID0 |
| 0 | Data is not present on SQID0 |
Bit 1 – RXUN Receive buffer Underflow Status bit
| Value | Description |
|---|---|
| 1 | Receive buffer Underflow has occurred |
| 0 | Receive buffer underflow has not occurred |
Bit 0 – TXOV Transmit buffer Overflow Status bit
| Value | Description |
|---|---|
| 1 | Transmit buffer overflow has occurred |
| 0 | Transmit buffer overflow has not occurred |