47.5.13.6 I⁸S LEFT JUSTIFIED MODE -AUDMOD=01 AUDFMT = 001, 010, 101, 110, 100

For example, I⁸S Left Justified mode, the transmitter drives the audio data’s MSB on the SCK edge that is coincident with an LRC transition. The receiver samples the MSB on the next SCK edge. Left justified can be used for all I⁸S formats with AUDWD_MODE[1:0]= 00,01, 10 and AUDFMT[2:0] = 001, 010, 101, 110, 100 settings. To configure for the I⁸S left justified standard convention, AM824 24-bit raw data, set the following bits in SPIxCTRL_* as follows: AUDMOD=01, AUDEN=1, FRMPOL=0, CPOL=1, CPHA = 1, FRMSYPW=0100, FRMCNT=011, AUDFMT[2:0]=101, AUDWD_MODE[1:0]=10, FRMCOINC=1. When set to transmit. The following figure shows the waveform for this configuration, with starting of a frame the falling edge transition of LRC.

An I²S example for AM824 24-bit raw data format would be the same as the I⁸S above with the differences of 2 channels in-place of 8 channels and the frame would be 64 bit clocks in stead of 256 bit clocks. To configure I²S set the following: AUDMOD=01, AUDEN=1, FRMPOL=0, CPOL=1, CPHA=1, FRMSYPW=0001, FRMCNT=001, AUDFMT[2:0]=001, AUDWD_MODE[1:0]=10, FRMCOINC=1.