6.3.2.2.3 Bus Mastered Row Programming

In dsPIC33A devices, row programming is performed directly from a buffer space in data RAM. The location of the RAM buffer is determined by the NVMSRCADR register(s), which are loaded with the data RAM address containing the first word of program data to be written. Before performing the programming operation, the buffer space in RAM must be loaded with the row of data to be programmed.

One row consists of 32 Flash words (128 bits + ECC). Row programming starts at the lowest address in the row and proceeds up to the highest address in the row. The module is not specified to operate when the operation is somewhere in the middle of the row and then wraps around.

The row program command automatically sequences through a row's worth of write data stored (by the user) in local memory. This module implements row programming operations as a sequence of 32, 140-bit word programming sequences.

During a row programming operation, the Flash controller becomes the bus initiator, and system RAM is used to store the row programming data. Firmware loads the row data into system RAM and configures the NVMSRCADR register with the starting address of the data in RAM prior to starting the Row Program operation. This address is word-aligned to 32-bit RAM addresses. The NVMADR address must be aligned to a Flash word address boundary where address [3:0] = 0b0000. During row programming, the NVMADR address may point to any Flash word within the Flash row.