24.4.7.1 ECC FAULT INJECTION

Fault injection is enabled by setting the I3CCON.FLTINJ bit. When fault injection is enabled, bit errors are injected on RAM reads at the RAM word address specified by the ECCFADDR register. Either a single bit error or a double bit error can be generated. The ECCFPTR register has two pointer fields. Each field can be independently configured to select either no error or the location of the bit error. The bit error target can be any one of the 32 data bits or 7 ECC bits in a RAM word.